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2019-01-31Fix sending memory-map for 64-bit targets. (#348)Tim Newsome23-63/+84
2019-01-22Move version check until after dmactive=1.Tim Newsome1-10/+10
2019-01-09Add 'riscv set_ir' command to set IR value for JTAG registers.Darius Rad3-16/+38
2019-01-08Add comment for reset_delays_wait.Tim Newsome4-34/+18
2019-01-02Fix typo.Tim Newsome1-1/+1
2018-12-13Fix block read corner cases.Tim Newsome1-43/+33
2018-12-04Add `riscv reset_delays` for testing.Tim Newsome4-2/+83
2018-12-03Deal with DMI busy in block reads/writes.Tim Newsome1-79/+110
2018-11-29Add idle count to debug output. (#337)Tim Newsome2-17/+33
2018-11-19From upstream (#331)Tim Newsome65-1594/+6510
2018-11-12Fix memory leaks. (#328)Tim Newsome1-4/+10
2018-11-12examine() should leave halted harts halted (#327)Tim Newsome1-6/+5
2018-11-07Doxygen style, too. (#325)Tim Newsome2-3/+3
2018-11-06Clean up fespi flashing code (#313)v20181030Tim Newsome1-260/+109
2018-11-05Remove unused extern declaration. (#324)Greg Savin1-3/+0
2018-11-05Support for two-wire cJTAG OSCAN1 signaling thru FTDI devices with appropriat...Greg Savin2-10/+354
2018-11-05Conform to OpenOCD style. (#323)Tim Newsome1-1/+1
2018-11-05Install patchutils for the build. (#321)Tim Newsome1-3/+2
2018-11-05Complete single step before returning. (#319)Tim Newsome1-1/+1
2018-11-05FIX(src/target/riscv/riscv.c): riscv_add_breakpoint: RVC: invalid 32bit trans...Pavel S. Smirnov1-10/+19
2018-11-02Fix 0.11 memory leak. (#318)Tim Newsome1-3/+3
2018-10-30Old fixes from June (#311)Carsten Gosvig4-36/+63
2018-10-24Revert "Don't report exact watchpoint to gdb. (#300)" (#304)Tim Newsome1-5/+1
2018-10-19Merge pull request #308 from riscv/eclipse_memory_readCarsten Gosvig2-45/+82
2018-10-19Moved comment and added initial buffer clearingv20180928eclipse_memory_readcgsfv1-3/+5
2018-10-18dmi_scan() allocate bytes depending on abits value (#307)Tim Newsome1-3/+7
2018-10-18Fix segfault in riscv_deinit_target(). (#306)Tim Newsome1-6/+11
2018-09-17Corrected wrong C syntaxcgsfv1-1/+1
2018-09-17Use LOG_DEBUG for debug messages: Discard unexpected charcgsfv1-1/+1
2018-09-17Read memory words individually if burst read failscgsfv1-44/+79
2018-09-17Update mpsse.cmpsse_flushMegan Wachs1-0/+1
2018-09-12Add wall clock timeout to mpsse_flush()Tim Newsome1-0/+6
2018-09-06Don't report exact watchpoint to gdb. (#300)Tim Newsome1-1/+5
2018-08-31More style fixesRyan Macdonald1-1/+1
2018-08-31Style fixesRyan Macdonald1-5/+4
2018-08-31Add pass message for SBA and compliance testsRyan Macdonald1-14/+42
2018-08-31Merge remote-tracking branch 'origin/riscv' into sba_testssba_testsMegan Wachs46-2/+12185
2018-08-30Merge pull request #298 from riscv/jimtcl-mirrorAndrew Waterman41-0/+11697
2018-08-30riscv-compliance: fix comment typoriscv-complianceMegan Wachs1-1/+1
2018-08-30riscv-compliance: fix whitespaceMegan Wachs1-25/+25
2018-08-30riscv-compliance: incorporate review feedbackMegan Wachs1-123/+108
2018-08-29Flatten libjaylink submoduleAndrew Waterman41-0/+11697
2018-08-29Fix typo.Tim Newsome1-1/+1
2018-08-29Fix strange merge.Tim Newsome1-2/+0
2018-08-29Merge branch 'riscv' into sba_testsTim Newsome179-3694/+18287
2018-08-29Merge remote-tracking branch 'origin/riscv' into riscv-compliance-rebaseMegan Wachs86-1461/+10118
2018-08-29Add command to expose custom registers (#293)Tim Newsome3-42/+140
2018-08-28Fix gdb_signal_reply() allocating too small buffer (#296)Tim Newsome1-2/+2
2018-08-27Match on qC, but not qCRC. (#294)Tim Newsome1-1/+1
2018-08-27Handle hardware watchpoints hit by RV32 loads and stores (#291)craigblackmore3-1/+86
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