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AgeCommit message (Expand)AuthorFilesLines
2019-09-27Fix the build.Tim Newsome1-13/+2
2019-09-27Merge branch 'master' into from_upstreamTim Newsome52-1232/+1088
2019-09-24Perform SBA writes with batch transactions for improved performance. (#405)darius-bluespec3-18/+60
2019-09-09Fix flashing HiFive Unleashed (#402)Tim Newsome3-16/+39
2019-09-08target/dsp563xx: dsp563xx restore reg supportHan Hartgers1-0/+1
2019-08-28gdb_server, rtos: Fine-grained RTOS register accessTim Newsome5-3/+63
2019-08-26Use only one hart to run algorithm. (#396)Tim Newsome2-11/+19
2019-08-19Adds support for RISCV Access Memory Abstract Commands (#394)dave-estes-syzexion1-6/+192
2019-07-26Properly detect errors in SBA reads. (#392)Tim Newsome1-19/+26
2019-07-18Access memory through the scope of current privilege level (#386)Nils Wistoff6-0/+137
2019-07-15Optimize reading a single byte/short/word. (#390)Tim Newsome1-4/+61
2019-07-15Write all ones to clear cmderr. (#389)Tim Newsome1-1/+1
2019-07-15Make resume order configurable. (#388)Tim Newsome1-7/+58
2019-07-09Redo fespi flash algorithm (#384)Tim Newsome1-0/+64
2019-07-08RV32E support (#387)Tim Newsome2-12/+31
2019-06-21Reduce abstract command execution by one scan. (#383)Tim Newsome1-37/+40
2019-06-20cortex_m: set C_DEBUGEN in soft_reset_haltAntonio Borneo1-0/+5
2019-06-20fix memory leak (#382)jhjung811-0/+1
2019-06-19Improve block read and checksum speed (#381)Tim Newsome6-17/+117
2019-06-19target/cortex_m: Add support for AHB5-APMarc Schink1-1/+10
2019-06-19target/arm_adiv5: Add type for AHB5-APMarc Schink3-6/+12
2019-06-19Support for debugging on ARMv8-M CPUsOmair Javaid2-15/+62
2019-06-14Set mstatus.FS to access FPU CSRs. (#380)Tim Newsome1-3/+12
2019-06-14target/cortex_a: remove dependency from jtag queueAntonio Borneo1-2/+3
2019-06-14target/aarch64: remove dependency from jtag queueAntonio Borneo1-2/+3
2019-06-13target: fix error on TCL command "return" in target event handlerAntonio Borneo1-1/+6
2019-06-12target: make target re-configuration possible againTomas Vanek1-1/+7
2019-06-12fix XScale register accessMichael Schwingen1-0/+1
2019-06-12mem_ap: fix format of logged addressesAntonio Borneo1-2/+2
2019-06-12armv7a_mmu: Add support for decoding Super SectionsFlorian Fainelli1-10/+27
2019-06-12armv7a_mmu: Do not restrict virtual addresses to uint32_tFlorian Fainelli3-6/+7
2019-06-12armv7a_mmu: Remove armv7a_mmu_translate_va()Florian Fainelli2-87/+0
2019-06-12armv7a_mmu: Check earlier for PAR readFlorian Fainelli1-2/+2
2019-06-10Inverted Frame to Pseudo Tap for Simpler Hardware to Decode DR (#373)Paul George3-82/+150
2019-06-10target/armv7m: fix register number in armv7m_get_core_reg()Tomas Vanek1-1/+1
2019-06-06target/cortex_m: remove dependency from jtag queueAntonio Borneo1-1/+1
2019-05-25arm_adi_v5: Split CSW bits into AHB/APB/AXILeonard Crestez3-8/+27
2019-05-23target: make handle_md_output() globalTomas Vanek3-64/+8
2019-05-23cortex_m: set the debug reason to DBGRQ when NVIC_DFSR indicates EXTERNALTarek BOCHKATI2-1/+4
2019-05-23target: remove unused function target_buffer_get_u8()Antonio Borneo1-6/+0
2019-05-21Don't write sbcs while sbbusy is set. (#375)Tim Newsome1-9/+24
2019-05-20RISC-V: Make compliance tests more verbose (#366)Philipp Wagner1-2/+10
2019-05-20RISC-V compliance test: target must be examined (#367)Philipp Wagner1-0/+6
2019-05-16More helpful debug output. (#374)Tim Newsome1-1/+1
2019-05-14target: Fix breakpoint usageMarc Schink1-1/+1
2019-05-14target: fix output of command "targets"Antonio Borneo1-7/+7
2019-05-14helper/command: change prototype of command_print/command_print_samelineAntonio Borneo39-475/+475
2019-05-14target/esirisc_trace: change prototype of trace dump functionsPaul Fertser1-14/+14
2019-05-14target/esirisc_trace: change prototype of trace analyse functionsPaul Fertser1-36/+36
2019-05-14target: change prototype of binprint()Paul Fertser1-8/+8
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