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2021-04-18helper/command: override target only on target prefixed cmdsAntonio Borneo4-22/+6
In current code the current target is overridden whenever jim_handler_data is not NULL. This happens not only with target prefixed commands, but also with cti, dap and swo/tpiu prefixed commands. While this is not causing any run-time issue, by now, the behaviour is tricky and makes the code cryptic. Add a specific field to struct command for the target override so the content of jim_handler_data can be restricted to command specific data only (today only cti, dap and swo/tpiu). Extend the API register_commands() to specify the presence of either the command data or the override target. The new API makes obsolete calling command_set_handler_data() to set jim_handler_data, so remove it. Change-Id: Icc323faf754b0546a72208f90abd9e68ff2ef52f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5667 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-04-18helper/command: get current target from dedicated APIAntonio Borneo2-36/+54
Now that target override is uniformly implemented for all types of commands, there is no need for target-prefixed "native" commands (.jim_handler) to sneakily extract the overridden target from the struct command. Modify the commands to use the standard API get_current_target(). Change-Id: I732a09c3261e56524edd5217634fa409eb97a8c6 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5666 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-04-18helper/command: always pass struct command as jim private dataAntonio Borneo3-21/+42
While registering a new command, jim accepts a pointer to command's private data that will be accessible during the command execution. Today openocd is not consistent and passes different private data depending on the command, and then even overwrites it: - "simple" commands (.handler) are registered with their own struct command pointer as command private data; - "native" commands (.jim_handler) at root level are registered with NULL command private data; - "native" commands (.jim_handler) not at root level are registered with the struct command pointer of their root command as command private data but, when executed, the command private data is overwritten by the value in field jim_handler_data taken from their struct command. Uniform the usage of command private data by always set it to the struct command pointer while registering the new commands. Note: for multi-word commands only the root command is registered, so command private data will be set to the struct command of the root command. This will change later in this series when the full- name of the command will be registered. Don't overwrite the command private data, but let the commands that needs jim_handler_data to get it directly through struct command. For sake of uniformity, let function command_set_handler_data() to set the field jim_handler_data also for "group" commands, even if such value will not be used. Now Jim_CmdPrivData() always returns a struct command pointer, so wrap it in the inline function jim_to_command() to gain compile time check on the returned type. While there, uniform the code to use the macro Jim_CmdPrivData() to access the command's private data pointer. Change-Id: Idba16242ba1f6769341b4030a49cdf35a5278695 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5664 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-04-18Aarch64:Switch to EL1 from EL0 before manipulate MMUCheng-Shiun Tsai1-0/+9
If current core is in EL0, it cannot use 'msr sctlr_el1, x0' Change-Id: I04e60e39e4c84f9d9de7cc87a8e438f5d2737dc3 Signed-off-by: Cheng-Shiun Tsai <cheng.shiun.tsai@gmail.com> Reviewed-on: http://openocd.zylin.com/6051 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2021-04-11mem_ap: allow GDB connectionsAntonio Borneo1-3/+90
The target mem_ap is a convenient way to access buses, memory and peripherals behind an ARM AP. The current implementation provides only access through OpenOCD commands, because GDB remote protocol has to interact with a CPU and has to operate on CPU states and registers. Using GDB to access the memory is welcome, because GDB can resolve the symbol's address from an ELF file and can nicely display the content of complex struct and data types. Extend mem_ap target with the bare minimal support for a remote GDB connection, by emulating a fake basic ARM core. It means that only a GDB that has support for ARM can be used (either 'aarch64', 'arm' or 'multiarch' GDB). This is not seen as a big limitation, because the mem_ap target is mainly used on ARM based devices. Add a minimalist register description for the fake CPU. Fill the field 'debug_reason' as expected by GDB server. Call the target halted event to reply to GDB halt requests. For backward compatibility, don't open the GDB port by default. If needed, it has to be specified at 'target create' or 'configure' with the flag '-gdb-port'. Change-Id: I5a1b7adb749746516f5d4ffc6193c47b70132364 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6034 Tested-by: jenkins
2021-04-11target/aarch64: Add watchpoint supportLiming Sun3-6/+227
There are some breakpoint/watchpoint related code in armv8_dpm.c, but seems not working for aarch64. Target aarch64 has its own breakpoint implementation in aarch64.c. This commit follows the same logic to add watchpoint support for target aarch64. This commit also increases the size of stop_reason[] in function gdb_signal_reply() since the old size is too small to fit in a 64-bit address, such as ffff8000115e6980. Change-Id: I907dc0e648130e36b434220f570c37d0e8eb5ce1 Signed-off-by: Liming Sun <lsun@mellanox.com> Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com> Reviewed-on: http://openocd.zylin.com/4761 Tested-by: jenkins Reviewed-by: Liming Sun <limings@nvidia.com> Reviewed-by: Kevin Burke <kevinb@os.amperecomputing.com> Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-19target/arc: refactor ARC register numbers definesEvgeniy Didin3-8/+51
For Zephyr rtos support it is necessary to define general register numbers for architecture. There were some already in arc.h file. Let's define ARC registers numbers as a set instead of separate defines. Change-Id: I63742b8608f9556c2ec9bd2661a0fd9cf88e9b74 Signed-off-by: Evgeniy Didin <didin@synopsys.com> Reviewed-on: http://openocd.zylin.com/6105 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-19build: remove warnings with gcc 11Rene Kita1-3/+3
This removes some warnings which prevent a successful build with -Werror which is enabled by default. I'm using gcc 11, so maybe others are not getting this warnings yet. In src/flash/nor/numicro.c the debug messages were misleadingly indented. In src/target/arm920t.c the array size where smaller than expected from the receiving function. Change-Id: I66f5c6a63beb9f9416e73b726299297476c884d8 Signed-off-by: Rene Kita <git@rkta.de> Reviewed-on: http://openocd.zylin.com/6104 Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-19aarch64: handle semihosting in aarch32 stateTarek BOCHKATI2-8/+56
Change-Id: I0e868d617db126a2b258e27b11979b75b5bb72f5 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/5860 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-19Implement CRC32 algorithm for RISC-V.Tim Newsome2-2/+81
Signed-off-by: Tim Newsome <tim@sifive.com> Change-Id: Id437f78e74e3d837ff203f84c4eeb996bfad9a01 Reviewed-on: http://openocd.zylin.com/6076 Reviewed-by: Jan Matyas <matyas@codasip.com> Reviewed-by: Marc Schink <dev@zapb.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Tested-by: jenkins
2021-03-19aarch64: add support for "reset halt"Christian Hoff2-7/+108
Support halting the CPU directly after a reset. If halt is requested, the CPU stops directly at the reset vector, before any code is executed. This functionality was implemented using the Reset Catch debug event. Change-Id: If90d54c088442340376f0b588ba10267ea8e7327 Signed-off-by: Christian Hoff <christian.hoff@advantest.com> Reviewed-on: http://openocd.zylin.com/5947 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-03-19jtag: remove minidriver code and minidriver-dummyAntonio Borneo2-24/+1
With zy1000 removed, there is no other implementation that uses the minidriver, apart from the test/example minidriver-dummy. While the idea of the minidriver is probably still valid (that is to intercept jtag primitives before serialization), there is no current use case, no guarantee it is really working, and the way it was implemented (by macros and #if conditionals) is really hard to maintain and test. Let's let it rip in git history, from where it could eventually be taken back in a more modern implementation. The entry points of minidriver API are still in the code with the original names. Change-Id: I882e32cb26cf5842f9cba14e3badaf8948e3760d Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6091 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-03-19oocd_trace: drop the code, deprecated in v0.10.0Antonio Borneo4-486/+0
The code for oocd_trace has been marked as deprecated in release v0.10.0, 4 years ago. Time to drop it! Change-Id: I989f8345dee4ff2369bcf5e2e2ace86bbd5aa6a5 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6088 Tested-by: jenkins
2021-03-19target: remove handling of target's deprecated_nameAntonio Borneo2-10/+0
We do not have anymore any deprecated target name. Drop the code to handle deprecated target names and the placehold in struct target_type. This patch is separated from the patch that drops the remaining deprecated target names to be ready to revert this if there is any need in the future. Change-Id: I96fca7ffa39d8292f81e79f115ea45c4a30035d7 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6087 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-03-19target: remove target names already deprecated in v0.8.0Antonio Borneo3-3/+0
Some target name were marked as deprecated in release v0.7.0 and v0.8.0, almost 7 years ago, and replaced with more 'actual' names. We can reasonably expect that in these 7 years any user of OpenOCD has already migrated to v0.8.0 or to some newer release, thus has already updated any local/personal script to get rid of the deprecated message. Drop the target names already deprecated in v0.8.0. Change-Id: I7c7491496db1b302b4eb1e9fc6090b58d4acf05a Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6086 Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-03-19startup.tcl: remove commands already deprecated in v0.7.0Antonio Borneo1-17/+0
Some command were already marked as deprecated in release v0.7.0, more then 7 years ago, and for some of them the depredation date is even earlier. We can reasonably expect that in these 7 years any user of OpenOCD has already migrated to v0.7.0 or to some following intermediate build, thus has already updated any local/personal script to get rid of the deprecated message. Drop the commands already deprecated in v0.7.0. Change-Id: I81cdc415ab855ebf30980ef5199f9780c5d7f932 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6085 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-03-19target/arm920t: remove command 'arm920t cp15i' deprecated in v0.4.0Antonio Borneo1-83/+0
The command 'arm920t cp15i' was marked as deprecated in release v0.4.0, almost 11 years ago. We can reasonably expect that in these years any user of OpenOCD has already migrated to v0.4.0 or to some newer release, thus has already updated any local/personal script. There is no run-time warning about the deprecation, but it is reported in the help and in the documentation. Drop the command already deprecated in v0.4.0. Change-Id: I755c4283e13e125558fcd73b15fe20498eae95ca Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6083 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-03-19target/arm720t: remove command 'arm720t cp15' deprecated in v0.4.0Antonio Borneo1-79/+0
The command 'arm720t cp15' was marked as deprecated in release v0.4.0, almost 11 years ago. We can reasonably expect that in these years any user of OpenOCD has already migrated to v0.4.0 or to some newer release, thus has already updated any local/personal script. There is no run-time warning about the deprecation, but it is reported in the help and in the documentation. Drop the command already deprecated in v0.4.0. Change-Id: I2b325d0312d96ca5e5f0f1bad13bb162b3b75c52 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6082 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-03-10cortex_m: avoid reading and writing non-existent registersTarek BOCHKATI3-6/+6
Change-Id: Iedc24352c8d3444372da06d00fcec9603540f950 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-on: http://openocd.zylin.com/6059 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-10server: revert commit 7e6556b3cad8Antonio Borneo2-3/+2
With the removal of old tpiu code, commit 7e6556b3cad8 ("server: permit the add_service function to return the created service") http://openocd.zylin.com/5717/ can be reverted. Fix also the new calls to add_service(). Change-Id: Ib7f2dfc6a9e829239e20313e0f121911085fdc00 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6031 Tested-by: jenkins Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
2021-03-10armv7m_trace: get rid of the old tpiu codeAntonio Borneo7-382/+222
Remove all the old tpiu code and replace it with a wrapper that uses the new commands, prints-out the new commands and informs about the deprecation. All the code that handles the deprecated tpiu commands is enclosed between the comments /* START_DEPRECATED_TPIU */ and /* END_DEPRECATED_TPIU */ so will be easy to remove it in the future. Change-Id: I70b0486770128203b923346382d9a90b8ec08439 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6030 Tested-by: jenkins Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
2021-03-10arm_tpiu_swo: add support for independent TPIU and SWOAntonio Borneo3-0/+1009
This is supposed to replace big part of armv7m_trace.[ch], since TPIU is not only the one implemented in Cortex-M3 and M4. Change-Id: I7588d16cbefe9cdb371c52fb0aa5cdfb48518804 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5858 Tested-by: jenkins
2021-03-10itm: rework itm commands before 'init'Antonio Borneo3-6/+11
If the command 'itm port[s]' is issued before 'init', the ITM can not be programmed because OpenOCD cannot access the target yet. The configuration is recorded and applied after target examine. The current test to trigger the ITM delayed-programming is based on the TPIU configuration. This is allowed because the only use of ITM it so send data through TPIU. In case of system TPIU, not belonging anymore to the target, there is no more association between target ITM and system TPIU. Add a flag to record the pending ITM configuration requested before 'init' and test the flag to trigger the delayed-programming of the ITM. Change-Id: I101eb97a116d7925cd2ff068f3e8813fc008b08e Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6029 Tested-by: jenkins
2021-03-10stlink: fix execution order in stlink_config_trace()Antonio Borneo1-1/+1
The change [1] guarantees that the value pointed by 'prescaler' gets always set, even when the adapter does not support the specific mode requested (e.g. sync), or during trace disabling. This works fine with the code in armv7m_trace_tpiu_config(), but requires all the parameters to be valid also to disable the trace (with 'enable==false'), otherwise returns error on incorrect parameters or even causes segmentation fault if pointers 'trace_freq' or 'prescaler' are NULL. Another problem in stlink_config_trace(), not linked with [1], is caused by a tentative to change the settings on an already enabled trace; the trace is disabled before the new parameters are fully validated and in case of invalid parameters the trace is not re-enabled. It would be more logical to first check all the parameters, then disable the trace, change the settings and re-enable the trace. Practically revert [1] by checking 'enable==false' at function entry, then disable trace and exit without any further check on the other parameters. For the case 'enable==true', validate all the function parameters then disable the trace, update the trace settings and re-enable the trace. Modify the caller armv7m_trace_tpiu_config() to initialize the variable 'prescaler' to a safe value to avoid the issue targeted by [1]. [1] commit 38277fa75280 ("jtag/drivers/stlink_usb: fix SWO prescaler") Change-Id: Ia6530682162ca2c9f5ac64301f2456f70cc07ed2 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5934 Tested-by: jenkins Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
2021-03-10armv7m_trace_itm_config: wait for ITMBusy to be clearedAdrian Negreanu2-0/+30
pg315 of CoreSight Components: It is recommended that the ITMEn bit is cleared and waits for the ITMBusy bit to be cleared, before changing any fields in the Control Register, otherwise the behavior can be unpredictable. Change-Id: Ie9a2b842825c98ee5edc9a35776320c668047769 Signed-off-by: Adrian Negreanu <adrian.negreanu@nxp.com> Reviewed-on: http://openocd.zylin.com/6043 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-10target: Remove redundant initialization of endiannessYasushi SHOJI1-3/+0
target->endianness is initialized to TARGET_ENDIAN_UNKNOWN at 34 lines below, before calling target_configure. This initialization is redundant and not needed. Change-Id: Iea2d5e17a13c1a8b0b209ba7c20043736b520ef6 Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com> Reviewed-on: http://openocd.zylin.com/6039 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-10target/mips: Remove typedef'd structMarc Schink4-10/+10
The C style guide forbids typedef'd structs, see 'Naming Rules'. Change-Id: I449590251056c478c05105cdc18014ab4eb77ed8 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: http://openocd.zylin.com/6033 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-03-04target: avoid polling during 'resumed' event handlerAntonio Borneo1-0/+11
OpenOCD is based on a single main loop that schedules all the activities. At the execution of a TCL command, the timestamp is checked to eventually trigger the polling of the targets. This means that by executing a TCL command the polling can be triggered and detect a change of target's state. When openocd 'resumes' a target, the target can halt again by hitting a breakpoint. The 'resumed' event handler is started just after the target has been resumed, but it triggers a polling before the execution of its very first instruction. If the polling finds the target halted, it will run the 'halted' event handler, that will then be executed 'before' the pending 'resumed' handler. In case of gdb, a 'continue' command will restart the target but, polling (and halt detection) executed before the end of the resume process will hide the halt. As a consequence, the gdb will not be informed of the halt and will remains waiting as if the target is still running without showing the prompt. This can be verified by running on the target a firmware with a loop, run openocd with a dummy 'resumed' event, and let gdb to set a breakpoint in the loop. A 'continue' command will cause the target to halt again by hitting the breakpoint at the next loop iteration, but gdb will loose it and will not return the prompt. openocd -f board/st_nucleo_f4.cfg -c \ 'stm32f4x.cpu configure -event resumed {echo hello}' arm-none-eabi-gdb -ex 'target remote :3333' -ex 'b *$pc' -ex c Disable the polling while executing target's resume(). Document it and provide hints to developers to cope with future implementation. Change-Id: I3be830a8e7c2ef6278617cb4547a4d676b0ddeb5 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reported-by: Габитов Александр Фаритович <gabitov@planarchel.ru> Reviewed-on: http://openocd.zylin.com/6074 Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Tested-by: jenkins
2021-02-13target: use proper macro for parsing watchpoint addressPeter Mamonov1-4/+4
Currently wp/rwp commands fail on 64-bit targets: > wp 0xffffffff80001400 4 addr option value ('0xffffffff80001400') is not valid Change-Id: I94d4af906b02b7bd463c8d79a6235a3646dfc434 Signed-off-by: Peter Mamonov <pmamonov@gmail.com> Reviewed-on: http://openocd.zylin.com/6058 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-01-18cortex_m: [FIX] ARMv8-M does not support VECTRESETTarek BOCHKATI1-2/+2
ref: Arm®v8-M Architecture Reference Manual (DDI0553B.m) D1.2.3: AIRCR, Application Interrupt and Reset Control Register Bit [0] is RES0 Change-Id: I6ef451b2c114487e2732852a60e86c292ffa6a50 Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com> Reviewed-on: http://openocd.zylin.com/6014 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-01-18target/riscv: fix build error with -Werror=maybe-uninitializedTarek BOCHKATI1-1/+1
using gcc 9.3 on ubuntu focal fossa with -Werror=maybe-uninitialized we get this error: /src/target/riscv/riscv.c: In function ‘riscv_address_translate’: /src/target/riscv/riscv.c:1536:13: error: ‘pte’ may be used uninitialized Change-Id: I51e180b43f9b6996e4e4058db49c179b9f81bcdc Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@st.com> Reviewed-on: http://openocd.zylin.com/6013 Tested-by: jenkins Reviewed-by: Tim Newsome <tim@sifive.com> Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-01-13openocd: fix doxygen parameters of functionsAntonio Borneo7-43/+47
Add to doxygen comment the missing parameters. Remove from doxygen comment any non-existing parameter. Fix the parameter names in doxygen comment to match the one in the function prototype. Where the parameter name in the doxygen description seems better than the one in the code, change the code. Escape the character '<' to prevent doxygen to interpret it as an xml tag. Change-Id: I22da723339ac7d7a7a64ac4c1cc4336e2416c2cc Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6002 Tested-by: jenkins
2021-01-13openocd: fix incorrect doxygen commentsAntonio Borneo1-12/+12
Use '@param' in front of function's parameters and '@a' when the parameter is recalled in the description. This fixes doxygen complains: warning: Found unknown command '@buff16' While there, fix a minor typo s/occured/occurred/ in a comment and the typo s/@apram/@param/ in a doxygen comment. Change-Id: I5cd86a80adef552331310a21c55ec5d11354be21 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6001 Tested-by: jenkins
2021-01-13target: fix memory leak on multiple '-gdb-port' flagAntonio Borneo1-0/+1
In the odd case of multiple flags '-gdb-port' during 'target create' or following 'configure', the new strdup()'ed value will replace the old one without freeing it. Free the old value (if it exists) before replacing it. Change-Id: I1673346613ce7023880046e3a9ba473e75f18b8a Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/6005 Tested-by: jenkins
2020-12-26cortex-a: fix reset on dapdirect transportsAntonio Borneo1-2/+2
The target code for assert reset on cortex_a has been patched on commit b0698501b0e7 ("cortex_a: fix cortex_a_assert_reset() if srst_gates_jtag") then in cdba6ba0ad63 ("cortex_a: fix reset for SWD transport") to workaround the mismatch between jtag and swd implementations. See discussion for the second patch at http://openocd.zylin.com/3641/ While all of these mismatches should hopefully be cleaned by the reset framework rework, an extension of the workaround of the second patch is required for dapdirect transports, either dapdirect_swd and dapdirect_jtag. Extend the existing workaround to all non-jtag transports. Change-Id: Ia6a9d43bab524cbb3de4c37ce24c45f25187353d Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5979 Tested-by: jenkins
2020-12-26armv7m_trace: stop getting traces from adapter at exitAntonio Borneo3-0/+21
If OpenOCD is reading trace data from the target, at exit it should stop the adapter to gather data, but should left the target still producing them. Add a helper in armv7m_trace to disable the adapter's trace and call it during OpenOCD teardown. This also provides a workaround for an issue in the firmware of ST-Link V3 till version V3J7. If the SWD connection is closed when trace is active, at following connection the trace does not work anymore. Change-Id: I47ccab61405384938555096c5aca789eaa090d27 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5978 Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li> Tested-by: jenkins
2020-12-05target/register: use an array of uint8_t for register's valueAntonio Borneo6-7/+7
The use of 'void *' makes the pointer arithmetic incompatible with standard C, even if this is allowed by GCC extensions. The use of 'void *' can also hide incorrect pointer assignments. Switch to 'uint8_t *' and add GCC warning flag to track any use of pointer arithmetic extension. Change-Id: Ic4d15a232834cd6b374330f70e2473a359b1607f Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5937 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05mips_mips64: fix minor host endianness bugAntonio Borneo1-1/+1
Commit 80f1a92bd798 ("mips64: Add generic mips64 target support") adds a log of the target's program counter in function mips_mips64_debug_entry() by directly casting the little-endian buffer in pc->value. This is going to print an incorrect value on big-endian hosts. Use the function buf_get_u64() to return the register value. Not tested on real HW. Issue identified with GCC compiler flag '-Wcast-align=strict' after change http://openocd.zylin.com/5937/ ("target/register: use an array of uint8_t for register's value"). Change-Id: Icbda2b54a03fdec287c804e623f5db4252f9cd2a Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: 80f1a92bd798 ("mips64: Add generic mips64 target support") Reviewed-on: http://openocd.zylin.com/5944 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05arm7_9_common: fix host endianness bug in arm7_9_full_context()Antonio Borneo1-4/+20
The original code passes to ->read_core_regs() and to ->read_xpsr() the pointer to the little-endian buffer reg.value. This is incorrect because the two functions above require a pointer to uint32_t, since they already run the conversion with arm_le_to_h_u32() in the jtag callback. This causes a mismatch on big-endian host and the registers get read with the incorrect endianness. Use an intermediate buffer to read the registers as uint32_t and to track the destination reg.value pointer, then copy the value in reg.value after the call to jtag_execute_queue(). Tested with qemu-armeb and an OpenOCD built through buildroot configured for cortex-a7 big-endian. Note that if jtag_execute_queue() fails, the openocd register cache is not updated, so the already modified flags 'valid' and 'dirty' are incorrect. This part should be moved after the call to jtag_execute_queue() too. Change-Id: Iba70d964ffbb74bf0860bfd9d299f218e3bc65bf Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5943 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-05armv4_5: fix output of command 'arm reg'Antonio Borneo1-0/+3
Commit fc2abe63fd3c ("armv7m: use generic arm::core_mode") adds two special modes for ARMv6M and ARMv7M in struct arm_mode_data[]. While these modes do not have any additional register to be dumped by command 'arm reg', the command still prints an header for these modes but not followed by any register. Detect the special modes for ARMv6M and ARMv7M and skip them to avoid printing the useless header. Change-Id: I04145769e5742624f143c910eebf9a6f6d8e3cdc Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: fc2abe63fd3c ("armv7m: use generic arm::core_mode") Reviewed-on: http://openocd.zylin.com/5942 Tested-by: jenkins
2020-12-05armv4_5: fix segmentation fault in command 'arm reg'Antonio Borneo1-0/+1
Commit fed713104904 ("armv4_5: support weirdo ARMv6 secure monitor mode") introduces the secure mode 28 of ARMv6 as a synonymous of mode 22 (MON), but does not add it in the switch/case in command 'arm reg'. When command 'arm reg' scans the array arm_mode_data[] on targets without secure modes, it does not detect the new secure mode as not supported by the architecture, thus triggers a segmentation fault when it try to read the register's value from unallocated memory. Issue detected with target arm926ejs. Add the new mode in the switch/case and treat it as the mode MON. Change-Id: I2b72cc558e097879a7ee6ea601200bfda6b60270 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Fixes: fed713104904 ("armv4_5: support weirdo ARMv6 secure monitor mode") Reviewed-on: http://openocd.zylin.com/5941 Tested-by: jenkins Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2020-12-02Add initial RTT supportMarc Schink5-2/+482
Real Time Transfer (RTT) is an interface specified by SEGGER based on basic memory reads and writes to transfer data bidirectionally between target and host. Every target that supports so called "background memory access", which means that the target memory can be accessed by the debugger while the target is running, can be used. RTT is especially of interest for targets which do not support Serial Wire Output (SWO) (e.g. ARM Cortex-M0) or where using semihosting is not possible (e.g. real-time applications) [1]. The data transfer is organized in channels where each channel consists of an up- and/or down-channel. See [2] for more details. Channels are exposed via TCP connections. One or more RTT server can be assigned to each channel to make them accessible to an unlimited number of TCP connections. The current implementation does not respect buffer flags which are used to determine what happens when writing to a full buffer. Note that the implementation is designed in a way that the RTT operations can be directly performed by an adapter (e.g. J-Link). [1] https://devzone.nordicsemi.com/tutorials/6/ [2] https://www.segger.com/jlink-rtt.html Change-Id: I8bc8a1b381fb74e08b8752d5cf53804cc573c1e0 Signed-off-by: Marc Schink <dev@zapb.de> Reviewed-on: http://openocd.zylin.com/4055 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-12-02adi_v5_swd: wait for readable DPIDR, ABORT if stalledTomas Vanek1-13/+56
Reading of DPIDR is the very first operation after JTAG to SWD sequence. Without this change if DPIDR read fails then swd connect fails. Keep trying JTAG to SWD sequence and DPIDR read until success or timeout 0.5 sec. It makes setting of adapter srst delay on SWD transport mostly unnecessary. Also test for ERROR_WAIT (which should not occur according to IHI 0031E B4.3.2 but a quirk is known) and if bus is kept stalled then issue abort to make the next connect possible. Change-Id: Id8fe6618605bbeb4fed5061e987ed55de90a35f2 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5730 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-12-02arm_adi_v5: prevent possibly endless recursion in dap_dp_init()Tomas Vanek3-23/+43
If dap_dp_read_atomic() in 30 trials loop fails, dap->do_reconnect is set. Following dap_dp_read_atomic() calls dap_queue_dp_read() which in case of SWD transport calls swd_queue_dp_read(). It starts with swd_check_reconnect() and it calls swd_connect() because dap->do_reconnect is set. swd_connect() does some initialization, reads DPIDR and calls dap_dp_init() again! Moreover if dap_dp_init() is called from cortex_m_reset_(de)assert() one level of recursion is necessary to reconnect the target. Introduce dap_dp_init_or_reconnect() for use in cortex_m reset and similar. Remove loop of 30 atomic reads of DP_STAT to prevent unwanted recursion. Change-Id: I54052fdefe50bf5f7c7b59fe751fe2063d5710c9 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5729 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2020-11-15target/armv7m, cortex_m: fix misleading commentsTomas Vanek2-6/+9
Change-Id: I4fea29f07f4d3b8b2578b538ef0eef5f1eea285f Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5876 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15target/cortex_m: remove wrong xPSR.ICI/IT bits handlingTomas Vanek1-6/+0
If a Cortex-M (not M0, M0+) target was stopped in the middle of a conditional IT block or in the load/store multiple instruction, cortex_m_debug_entry() used wrong xPSR bits to detect it and then cleared 8 bits of the exception number from xPSR - probably wrong bit mask again. I believe clearing of the ICI/IT bits in cortex_m_debug_entry() has no reason as Cortex-M does not use instruction injecting. Remove the wrong code. The change was originally a part of http://openocd.zylin.com/4862 It is now re-submitted as #4862 is not ready. Change-Id: If91cd91d1b81b2684f7d5f10cf20452cde1a7f56 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5874 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15target/armv7m: use arch_info[i].value instead of allocated memoryTomas Vanek2-6/+1
Change-Id: I9422cab484d0769404516947e16da1baa001a4e0 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5328 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15cortex_m: use the new enum ARMV7M_REGSEL_nameAntonio Borneo1-1/+1
Register xPSR is indexed directly with its value 16 or with the incorrect enum ARMV7M_xPSR. Replace them with the new enum ARMV7M_REGSEL_xPSR. Change-Id: I86600e7f78e39002ce45f66d4792d5067c1f541b Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5873 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2020-11-15target/cortex_m,hla_target: rework Cortex-M register handling part 4Tomas Vanek2-227/+8
Consolidate low level register read/write. Floating point registers were handled by target_read/write_u32 unlike other registers handled by cortexm_dap_read/write_coreregister_u32 There is no reason to do so in cortex_m. Remove cortexm_dap_read/write_coreregister_u32 and use cortex_m_load/store_core_reg_u32 directly. Similarly HLA adapters register read/write interface supports all registers so use it for any floating point and other registers. Change-Id: Ida679e5f4fec02d94ffb0bd3f265ed7ed2221cdc Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5864 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2020-11-15target/armv7m: rework Cortex-M register handling part 3Tomas Vanek4-165/+159
Move primask/basepri/faultmask/control packing/unpacking from cortex_m.c and hla_target.c to armv7m.c armv7m_read_core_reg() and armv7m_write_core_reg() where also the FP 32/64-bit registers conversion takes place. Introduce a new hidden register ARMV7M_PMSK_BPRI_FLTMSK_CTRL for packing/unpacking of special registers in the register cache. The new packing/unpacking is endianess safe. While on it improve returned error codes and LOG_ messages. Just minimal changes in cortex_m.c and hla_target.c, will be consolidated in the next patch. Change-Id: Id51e764e243e54b5fdaadf2a202eee7c4bc729fe Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: http://openocd.zylin.com/5863 Tested-by: jenkins Reviewed-by: Christopher Head <chead@zaber.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
generated by cgit v1.1 at 2024-09-28 14:15:16 +0000