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| author | Rene Kita <git@rkta.de> | 2021-03-12 18:38:02 +0100 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2021-03-19 22:00:34 +0000 |
| commit | 6db49eb8858023654084088c73d968e190aec491 (patch) | |
| tree | 8d782a58927d898fd29eef84182ea79e98b77b7a /src/target | |
| parent | 84af95bb54926f9cec10673362457aa99415c0cd (diff) | |
| download | riscv-openocd-6db49eb8858023654084088c73d968e190aec491.zip riscv-openocd-6db49eb8858023654084088c73d968e190aec491.tar.gz riscv-openocd-6db49eb8858023654084088c73d968e190aec491.tar.bz2 | |
build: remove warnings with gcc 11
This removes some warnings which prevent a successful build with -Werror
which is enabled by default. I'm using gcc 11, so maybe others are not
getting this warnings yet.
In src/flash/nor/numicro.c the debug messages were misleadingly indented.
In src/target/arm920t.c the array size where smaller than expected from
the receiving function.
Change-Id: I66f5c6a63beb9f9416e73b726299297476c884d8
Signed-off-by: Rene Kita <git@rkta.de>
Reviewed-on: http://openocd.zylin.com/6104
Reviewed-by: Jonathan McDowell <noodles-openocd@earth.li>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'src/target')
| -rw-r--r-- | src/target/arm920t.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/target/arm920t.c b/src/target/arm920t.c index 80f6d70..a45dc64 100644 --- a/src/target/arm920t.c +++ b/src/target/arm920t.c @@ -245,8 +245,8 @@ static int arm920t_read_cp15_interpreted(struct target *target, uint32_t cp15_opcode, uint32_t address, uint32_t *value) { struct arm *arm = target_to_arm(target); - uint32_t *regs_p[1]; - uint32_t regs[2]; + uint32_t *regs_p[16]; + uint32_t regs[16]; uint32_t cp15c15 = 0x0; struct reg *r = arm->core_cache->reg_list; @@ -295,7 +295,7 @@ int arm920t_write_cp15_interpreted(struct target *target, { uint32_t cp15c15 = 0x0; struct arm *arm = target_to_arm(target); - uint32_t regs[2]; + uint32_t regs[16]; struct reg *r = arm->core_cache->reg_list; /* load value, address into R0, R1 */ |