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-rw-r--r--tcl/target/dsp56321.cfg4
-rw-r--r--tcl/target/dsp568013.cfg4
-rw-r--r--tcl/target/fm3.cfg4
-rw-r--r--tcl/target/imx.cfg2
-rw-r--r--tcl/target/ixp42x.cfg4
-rw-r--r--tcl/target/lpc2103.cfg2
-rw-r--r--tcl/target/lpc2124.cfg2
-rw-r--r--tcl/target/lpc2129.cfg2
-rw-r--r--tcl/target/lpc2148.cfg2
-rw-r--r--tcl/target/lpc2294.cfg4
-rw-r--r--tcl/target/lpc2378.cfg2
-rw-r--r--tcl/target/lpc2460.cfg2
-rw-r--r--tcl/target/lpc2478.cfg2
-rw-r--r--tcl/target/lpc2xxx.cfg2
-rw-r--r--tcl/target/lpc3131.cfg2
-rw-r--r--tcl/target/u8500.cfg20
16 files changed, 30 insertions, 30 deletions
diff --git a/tcl/target/dsp56321.cfg b/tcl/target/dsp56321.cfg
index 0ac0ce8..78ecb3b 100644
--- a/tcl/target/dsp56321.cfg
+++ b/tcl/target/dsp56321.cfg
@@ -1,13 +1,13 @@
# Script for freescale DSP56321
#
-if { [info exists CHIPNAME] } {
+if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME dsp56321
}
-if { [info exists ENDIAN] } {
+if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
# this defaults to a big endian
diff --git a/tcl/target/dsp568013.cfg b/tcl/target/dsp568013.cfg
index 40fa3c2..67d4419 100644
--- a/tcl/target/dsp568013.cfg
+++ b/tcl/target/dsp568013.cfg
@@ -1,12 +1,12 @@
# Script for freescale DSP568013
-if { [info exists CHIPNAME] } {
+if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME dsp568013
}
-if { [info exists ENDIAN] } {
+if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
# this defaults to a big endian
diff --git a/tcl/target/fm3.cfg b/tcl/target/fm3.cfg
index 376320e..544cff9 100644
--- a/tcl/target/fm3.cfg
+++ b/tcl/target/fm3.cfg
@@ -36,10 +36,10 @@ dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap $_CHIPNAME.dap
-# MB9BF506 has 64kB of SRAM on its main system bus
+# MB9BF506 has 64kB of SRAM on its main system bus
$_TARGETNAME configure -work-area-phys 0x1FFF8000 -work-area-size 0x10000 -work-area-backup 0
-# MB9BF506 has 512kB internal FLASH
+# MB9BF506 has 512kB internal FLASH
set _FLASHNAME $_CHIPNAME.flash
flash bank $_FLASHNAME fm3 0 0 0 0 $_TARGETNAME
diff --git a/tcl/target/imx.cfg b/tcl/target/imx.cfg
index 9eea53e..ccfddb6 100644
--- a/tcl/target/imx.cfg
+++ b/tcl/target/imx.cfg
@@ -6,7 +6,7 @@ set TARGETNAME $_TARGETNAME
# rewrite commands of the form below to arm11 mcr...
# Data.Set c15:0x042f %long 0x40000015
proc setc15 {regs value} {
- global TARGETNAME
+ global TARGETNAME
echo [format "set p15 0x%04x, 0x%08x" $regs $value]
diff --git a/tcl/target/ixp42x.cfg b/tcl/target/ixp42x.cfg
index 3f86e35..624fe29 100644
--- a/tcl/target/ixp42x.cfg
+++ b/tcl/target/ixp42x.cfg
@@ -66,8 +66,8 @@ set IXP42x_SDRAM_256MB_32Mx16_2BANK 0x0015
# helper function to init SDRAM on IXP42x.
# SDRAM_CFG: one of IXP42X_SDRAM_xxx
-# REFRESH: refresh counter reload value (integer)
-# CASLAT: 2 or 3
+# REFRESH: refresh counter reload value (integer)
+# CASLAT: 2 or 3
proc ixp42x_init_sdram { SDRAM_CFG REFRESH CASLAT } {
switch $CASLAT {
diff --git a/tcl/target/lpc2103.cfg b/tcl/target/lpc2103.cfg
index f55777f..131b9ef 100644
--- a/tcl/target/lpc2103.cfg
+++ b/tcl/target/lpc2103.cfg
@@ -15,7 +15,7 @@ proc setup_lpc2103 {core_freq_khz adapter_freq_khz} {
proc init_targets {} {
# default to core clocked with 12MHz crystal
echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different."
-
+
# setup_lpc2103 <core_freq_khz> <adapter_freq_khz>
setup_lpc2103 12000 1500
}
diff --git a/tcl/target/lpc2124.cfg b/tcl/target/lpc2124.cfg
index 0251738..ddbde22 100644
--- a/tcl/target/lpc2124.cfg
+++ b/tcl/target/lpc2124.cfg
@@ -15,7 +15,7 @@ proc setup_lpc2124 {core_freq_khz adapter_freq_khz} {
proc init_targets {} {
# default to core clocked with 12MHz crystal
echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different."
-
+
# setup_lpc2124 <core_freq_khz> <adapter_freq_khz>
setup_lpc2124 12000 1500
}
diff --git a/tcl/target/lpc2129.cfg b/tcl/target/lpc2129.cfg
index 2c33cde..a1c3fe7 100644
--- a/tcl/target/lpc2129.cfg
+++ b/tcl/target/lpc2129.cfg
@@ -15,7 +15,7 @@ proc setup_lpc2129 {core_freq_khz adapter_freq_khz} {
proc init_targets {} {
# default to core clocked with 12MHz crystal
echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different."
-
+
# setup_lpc2129 <core_freq_khz> <adapter_freq_khz>
setup_lpc2129 12000 1500
}
diff --git a/tcl/target/lpc2148.cfg b/tcl/target/lpc2148.cfg
index f3a2011..503a682 100644
--- a/tcl/target/lpc2148.cfg
+++ b/tcl/target/lpc2148.cfg
@@ -15,7 +15,7 @@ proc setup_lpc2148 {core_freq_khz adapter_freq_khz} {
proc init_targets {} {
# default to core clocked with 12MHz crystal
echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different."
-
+
# setup_lpc2148 <core_freq_khz> <adapter_freq_khz>
setup_lpc2148 12000 1500
}
diff --git a/tcl/target/lpc2294.cfg b/tcl/target/lpc2294.cfg
index 83d595d..1320cda 100644
--- a/tcl/target/lpc2294.cfg
+++ b/tcl/target/lpc2294.cfg
@@ -9,7 +9,7 @@ source [find target/lpc2xxx.cfg]
proc setup_lpc2294 {core_freq_khz adapter_freq_khz} {
# 256kB flash and 16kB SRAM
# setup_lpc2xxx <chip_name> <cputapid> <flash_size> <flash_variant> <workarea_size> <core_freq_khz> <adapter_freq_khz>
-
+
# !! TAPID unknown !!
setup_lpc2xxx lpc2294 0xffffffff 0x40000 lpc2000_v1 0x4000 $core_freq_khz $adapter_freq_khz
}
@@ -17,7 +17,7 @@ proc setup_lpc2294 {core_freq_khz adapter_freq_khz} {
proc init_targets {} {
# default to core clocked with 12MHz crystal
echo "Warning - assuming default core clock 12MHz! Flashing may fail if actual core clock is different."
-
+
# setup_lpc2294 <core_freq_khz> <adapter_freq_khz>
setup_lpc2294 12000 1500
}
diff --git a/tcl/target/lpc2378.cfg b/tcl/target/lpc2378.cfg
index 0b66b82..235456a 100644
--- a/tcl/target/lpc2378.cfg
+++ b/tcl/target/lpc2378.cfg
@@ -15,7 +15,7 @@ proc setup_lpc2378 {core_freq_khz adapter_freq_khz} {
proc init_targets {} {
# default to core clocked with 4MHz internal oscillator
echo "Warning - assuming default core clock 4MHz! Flashing may fail if actual core clock is different."
-
+
# setup_lpc2378 <core_freq_khz> <adapter_freq_khz>
setup_lpc2378 4000 500
}
diff --git a/tcl/target/lpc2460.cfg b/tcl/target/lpc2460.cfg
index 69fdc4a..c229f6d 100644
--- a/tcl/target/lpc2460.cfg
+++ b/tcl/target/lpc2460.cfg
@@ -15,7 +15,7 @@ proc setup_lpc2460 {core_freq_khz adapter_freq_khz} {
proc init_targets {} {
# default to core clocked with 4MHz internal oscillator
echo "Warning - assuming default core clock 4MHz! Flashing may fail if actual core clock is different."
-
+
# setup_lpc2460 <core_freq_khz> <adapter_freq_khz>
setup_lpc2460 4000 500
}
diff --git a/tcl/target/lpc2478.cfg b/tcl/target/lpc2478.cfg
index 48e5bdf..36b5c46 100644
--- a/tcl/target/lpc2478.cfg
+++ b/tcl/target/lpc2478.cfg
@@ -15,7 +15,7 @@ proc setup_lpc2478 {core_freq_khz adapter_freq_khz} {
proc init_targets {} {
# default to core clocked with 4MHz internal oscillator
echo "Warning - assuming default core clock 4MHz! Flashing may fail if actual core clock is different."
-
+
# setup_lpc2478 <core_freq_khz> <adapter_freq_khz>
setup_lpc2478 4000 500
}
diff --git a/tcl/target/lpc2xxx.cfg b/tcl/target/lpc2xxx.cfg
index 4c3394c..f947c1b 100644
--- a/tcl/target/lpc2xxx.cfg
+++ b/tcl/target/lpc2xxx.cfg
@@ -40,5 +40,5 @@ proc setup_lpc2xxx {chip_name cputapids flash_size flash_variant workarea_size c
proc init_targets {} {
# FIX!!! read out CPUTAPID here and choose right setup. In addition to the
# CPUTAPID some querying of the target would be required.
- return -error "This is a generic LPC2xxx configuration file, use a specific target file."
+ return -error "This is a generic LPC2xxx configuration file, use a specific target file."
}
diff --git a/tcl/target/lpc3131.cfg b/tcl/target/lpc3131.cfg
index d6f2cdb..89bbf02 100644
--- a/tcl/target/lpc3131.cfg
+++ b/tcl/target/lpc3131.cfg
@@ -56,7 +56,7 @@ adapter srst delay 1000
jtag_ntrst_delay 0
set _TARGETNAME $_CHIPNAME.cpu
-target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
+target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
$_TARGETNAME invoke-event halted
diff --git a/tcl/target/u8500.cfg b/tcl/target/u8500.cfg
index baef9c8..36e0db7 100644
--- a/tcl/target/u8500.cfg
+++ b/tcl/target/u8500.cfg
@@ -1,6 +1,6 @@
# Copyright (C) ST-Ericsson SA 2011
# Author : michel.jaouen@stericsson.com
-# U8500 target
+# U8500 target
proc mmu_off {} {
set cp [arm mrc 15 0 1 0 0]
@@ -31,7 +31,7 @@ proc ocd_gdb_restart {target_id} {
proc smp_reg {} {
global _TARGETNAME_1
global _TARGETNAME_2
- targets $_TARGETNAME_1
+ targets $_TARGETNAME_1
echo "$_TARGETNAME_1"
set pc1 [reg pc]
set stck1 [reg sp_svc]
@@ -68,7 +68,7 @@ proc pwrsts { } {
8 {
echo "A9 100% DVFS"
}
- c {
+ c {
echo "A9 50% DVFS"
}
}
@@ -144,7 +144,7 @@ tcl_port 5555
telnet_port 4444
gdb_port 3333
-if { [info exists CHIPNAME] } {
+if { [info exists CHIPNAME] } {
global _CHIPNAME
set _CHIPNAME $CHIPNAME
} else {
@@ -194,12 +194,12 @@ set _TARGETNAME_1 $TARGETNAME_1
if { [info exists DAP_DBG1] } {
set _DAP_DBG1 $DAP_DBG1
} else {
- set _DAP_DBG1 0x801A8000
+ set _DAP_DBG1 0x801A8000
}
if { [info exists DAP_DBG2] } {
set _DAP_DBG2 $DAP_DBG2
} else {
- set _DAP_DBG2 0x801AA000
+ set _DAP_DBG2 0x801AA000
}
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
@@ -226,7 +226,7 @@ global _SMP
set _SMP $SMP
}
global SMP
-if { $_SMP == 1} {
+if { $_SMP == 1} {
target smp $_CHIPNAME.cpu2 $_CHIPNAME.cpu1
}
@@ -264,7 +264,7 @@ proc att { } {
} else {
echo "target secured"
}
-
+
}
@@ -310,10 +310,10 @@ if {![info exists MAXSPEED]} {
global _MAXSPEED
set _MAXSPEED 15000
} else {
-global _MAXSPEED
+global _MAXSPEED
set _MAXSPEED $MAXSPEED
}
-global _MAXSPEED
+global _MAXSPEED
adapter speed $_MAXSPEED
generated by cgit v1.1 at 2024-07-17 23:19:58 +0000