diff options
Diffstat (limited to 'src/flash')
-rw-r--r-- | src/flash/nor/efm32.c | 12 | ||||
-rw-r--r-- | src/flash/nor/spi.c | 1 | ||||
-rw-r--r-- | src/flash/nor/stm32f1x.c | 2 | ||||
-rw-r--r-- | src/flash/nor/stm32f2x.c | 2 | ||||
-rw-r--r-- | src/flash/nor/stm32h7x.c | 2 | ||||
-rw-r--r-- | src/flash/nor/stm32l4x.c | 3 |
6 files changed, 6 insertions, 16 deletions
diff --git a/src/flash/nor/efm32.c b/src/flash/nor/efm32.c index 3a49afc..f8e0886 100644 --- a/src/flash/nor/efm32.c +++ b/src/flash/nor/efm32.c @@ -251,18 +251,6 @@ static int efm32x_read_info(struct flash_bank *bank) memset(efm32_info, 0, sizeof(struct efm32_info)); - const struct cortex_m_common *cortex_m = target_to_cm(bank->target); - - switch (cortex_m->core_info->partno) { - case CORTEX_M3_PARTNO: - case CORTEX_M4_PARTNO: - case CORTEX_M0P_PARTNO: - break; - default: - LOG_ERROR("Target is not Cortex-Mx Device"); - return ERROR_FAIL; - } - ret = efm32x_get_flash_size(bank, &(efm32_info->flash_sz_kib)); if (ret != ERROR_OK) return ret; diff --git a/src/flash/nor/spi.c b/src/flash/nor/spi.c index 3bcaa9f..ace274f 100644 --- a/src/flash/nor/spi.c +++ b/src/flash/nor/spi.c @@ -171,6 +171,7 @@ const struct flash_device flash_devices[] = { FLASH_ID("xtx xt25q32b", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0016600b, 0x100, 0x10000, 0x400000), /* exists ? */ FLASH_ID("xtx xt25q64b", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0017600b, 0x100, 0x10000, 0x800000), FLASH_ID("xtx xt25q128b", 0x03, 0x0b, 0x02, 0xd8, 0xc7, 0x0018600b, 0x100, 0x10000, 0x1000000), + FLASH_ID("zetta zd25q16", 0x03, 0x00, 0x02, 0xd8, 0xc7, 0x001560ba, 0x100, 0x10000, 0x200000), /* FRAM, no erase commands, no write page or sectors */ FRAM_ID("fu mb85rs16n", 0x03, 0, 0x02, 0x00010104, 0x800), diff --git a/src/flash/nor/stm32f1x.c b/src/flash/nor/stm32f1x.c index ab1ef2a..b3bb843 100644 --- a/src/flash/nor/stm32f1x.c +++ b/src/flash/nor/stm32f1x.c @@ -743,7 +743,7 @@ static int stm32x_get_property_addr(struct target *target, struct stm32x_propert return ERROR_TARGET_NOT_EXAMINED; } - switch (cortex_m_get_partno_safe(target)) { + switch (cortex_m_get_impl_part(target)) { case CORTEX_M0_PARTNO: /* STM32F0x devices */ addr->device_id = 0x40015800; addr->flash_size = 0x1FFFF7CC; diff --git a/src/flash/nor/stm32f2x.c b/src/flash/nor/stm32f2x.c index dcaf260..2e0d158 100644 --- a/src/flash/nor/stm32f2x.c +++ b/src/flash/nor/stm32f2x.c @@ -961,7 +961,7 @@ static int stm32x_get_device_id(struct flash_bank *bank, uint32_t *device_id) return retval; if ((*device_id & 0xfff) == 0x411 - && cortex_m_get_partno_safe(target) == CORTEX_M4_PARTNO) { + && cortex_m_get_impl_part(target) == CORTEX_M4_PARTNO) { *device_id &= ~((0xFFFF << 16) | 0xfff); *device_id |= (0x1000 << 16) | 0x413; LOG_INFO("stm32f4x errata detected - fixing incorrect MCU_IDCODE"); diff --git a/src/flash/nor/stm32h7x.c b/src/flash/nor/stm32h7x.c index 8be8037..21618b3 100644 --- a/src/flash/nor/stm32h7x.c +++ b/src/flash/nor/stm32h7x.c @@ -795,7 +795,7 @@ static int stm32x_probe(struct flash_bank *bank) /* STM32H74x/H75x, the second core (Cortex-M4) cannot read the flash size */ retval = ERROR_FAIL; if (device_id == DEVID_STM32H74_H75XX - && cortex_m_get_partno_safe(target) == CORTEX_M4_PARTNO) + && cortex_m_get_impl_part(target) == CORTEX_M4_PARTNO) LOG_WARNING("%s cannot read the flash size register", target_name(target)); else retval = target_read_u16(target, stm32x_info->part_info->fsize_addr, &flash_size_in_kb); diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c index 934deec..4414cf5 100644 --- a/src/flash/nor/stm32l4x.c +++ b/src/flash/nor/stm32l4x.c @@ -326,6 +326,7 @@ static const struct stm32l4_rev stm32g47_g48xx_revs[] = { static const struct stm32l4_rev stm32l4r_l4sxx_revs[] = { { 0x1000, "A" }, { 0x1001, "Z" }, { 0x1003, "Y" }, { 0x100F, "W" }, + { 0x101F, "V" }, }; static const struct stm32l4_rev stm32l4p_l4qxx_revs[] = { @@ -1681,7 +1682,7 @@ static int stm32l4_read_idcode(struct flash_bank *bank, uint32_t *id) /* CPU2 (Cortex-M0+) is supported only with non-hla adapters because it is on AP1. * Using HLA adapters armv7m.debug_ap is null, and checking ap_num triggers a segfault */ - if (cortex_m_get_partno_safe(target) == CORTEX_M0P_PARTNO && + if (cortex_m_get_impl_part(target) == CORTEX_M0P_PARTNO && armv7m->debug_ap && armv7m->debug_ap->ap_num == 1) { uint32_t uid64_ids; |