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authorJan Kowalewski <jkowalewski@antmicro.com>2020-07-03 18:19:01 +0200
committerAntonio Borneo <borneo.antonio@gmail.com>2020-10-03 11:20:30 +0100
commitc3166b43e415305e864c2ee3c4e2ed8c9cd37076 (patch)
tree2bb5747ae257d0d3a2c2e74d9ae22a581d6b8f89 /tcl/target
parent051e80812b1b3bb4deabef272c12bb95f10748da (diff)
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tcl/target: Add QuickLogic EOS S3 MCU configuration
Add configuration for QuickLogic EOS S3 MCU target. Change-Id: I375057ff387a826e632f194843dbd92148b0c5dd Signed-off-by: Jan Kowalewski <jkowalewski@antmicro.com> Reviewed-on: http://openocd.zylin.com/5802 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'tcl/target')
-rw-r--r--tcl/target/eos_s3.cfg44
1 files changed, 44 insertions, 0 deletions
diff --git a/tcl/target/eos_s3.cfg b/tcl/target/eos_s3.cfg
new file mode 100644
index 0000000..f6016fb
--- /dev/null
+++ b/tcl/target/eos_s3.cfg
@@ -0,0 +1,44 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# QuickLogic EOS S3
+# https://www.quicklogic.com/products/soc/eos-s3-microcontroller/
+
+source [find target/swj-dp.tcl]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME eos_s3
+}
+
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x80000
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ if { [using_jtag] } {
+ set _CPUTAPID 0x4ba00477
+ } {
+ set _CPUTAPID 0x2ba01477
+ }
+}
+
+swj_newdap $_CHIPNAME cpu -irlen 4 -irmask 0xf -expected-id _CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
+
+# For now we use SRAM only for software upload
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
+
+adapter speed 4000
+
+if {![using_hla]} {
+ # if srst is not fitted use SYSRESETREQ to
+ # perform a soft reset
+ cortex_m reset_config sysresetreq
+}