diff options
| author | Paul Fertser <fercerpav@gmail.com> | 2015-02-09 17:04:52 +0300 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2015-03-25 20:46:43 +0000 |
| commit | a09a75653dbe7ad99da6349285ab6622b80fdc15 (patch) | |
| tree | b8e759d751b4f1c644c4365942a38bdc8b5e3ee6 /tcl/target/stm32f1x.cfg | |
| parent | 3e1dfdcb8531ae684537325ad2c94b845d741085 (diff) | |
| download | riscv-openocd-a09a75653dbe7ad99da6349285ab6622b80fdc15.zip riscv-openocd-a09a75653dbe7ad99da6349285ab6622b80fdc15.tar.gz riscv-openocd-a09a75653dbe7ad99da6349285ab6622b80fdc15.tar.bz2 | |
armv7m: add generic trace support (TPIU, ITM, etc.)
This provides support for various trace-related subsystems in a
generic and expandable way.
Change-Id: I3a27fa7b8cfb111753088bb8c3d760dd12d1395f
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2538
Tested-by: jenkins
Diffstat (limited to 'tcl/target/stm32f1x.cfg')
| -rw-r--r-- | tcl/target/stm32f1x.cfg | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/tcl/target/stm32f1x.cfg b/tcl/target/stm32f1x.cfg index 6a62992..bd02e95 100644 --- a/tcl/target/stm32f1x.cfg +++ b/tcl/target/stm32f1x.cfg @@ -4,6 +4,7 @@ # stm32 devices support both JTAG and SWD transports. # source [find target/swj-dp.tcl] +source [find mem_helper.tcl] if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME @@ -93,3 +94,16 @@ if {![using_hla]} { # perform a soft reset cortex_m reset_config sysresetreq } + +$_TARGETNAME configure -event examine-end { + # DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP | + # DBG_STANDBY | DBG_STOP | DBG_SLEEP + mmw 0xE0042004 0x00000307 0 +} + +$_TARGETNAME configure -event trace-config { + # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync + # change this value accordingly to configure trace pins + # assignment + mmw 0xE0042004 0x00000020 0 +} |