From a09a75653dbe7ad99da6349285ab6622b80fdc15 Mon Sep 17 00:00:00 2001 From: Paul Fertser Date: Mon, 9 Feb 2015 17:04:52 +0300 Subject: armv7m: add generic trace support (TPIU, ITM, etc.) This provides support for various trace-related subsystems in a generic and expandable way. Change-Id: I3a27fa7b8cfb111753088bb8c3d760dd12d1395f Signed-off-by: Paul Fertser Reviewed-on: http://openocd.zylin.com/2538 Tested-by: jenkins --- tcl/target/stm32f1x.cfg | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'tcl/target/stm32f1x.cfg') diff --git a/tcl/target/stm32f1x.cfg b/tcl/target/stm32f1x.cfg index 6a62992..bd02e95 100644 --- a/tcl/target/stm32f1x.cfg +++ b/tcl/target/stm32f1x.cfg @@ -4,6 +4,7 @@ # stm32 devices support both JTAG and SWD transports. # source [find target/swj-dp.tcl] +source [find mem_helper.tcl] if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME @@ -93,3 +94,16 @@ if {![using_hla]} { # perform a soft reset cortex_m reset_config sysresetreq } + +$_TARGETNAME configure -event examine-end { + # DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP | + # DBG_STANDBY | DBG_STOP | DBG_SLEEP + mmw 0xE0042004 0x00000307 0 +} + +$_TARGETNAME configure -event trace-config { + # Set TRACE_IOEN; TRACE_MODE is set to async; when using sync + # change this value accordingly to configure trace pins + # assignment + mmw 0xE0042004 0x00000020 0 +} -- cgit v1.1