Merge commit '4b1ea8511a7da9d7201df40302e3341c6e97ffdd' into from_upstream

Change-Id: I59366e08a4ac7e443e426b5fd6727c649f1ac9d5

8 files changed, 106 insertions, 3 deletions

diff --git a/tcl/board/bemicro_cycloneiii.cfg b/tcl/board/bemicro_cycloneiii.cfg
index 95dd394..bd1459a 100644
--- a/tcl/board/bemicro_cycloneiii.cfg
+++ b/tcl/board/bemicro_cycloneiii.cfg
@@ -16,5 +16,9 @@ source [find fpga/altera-cycloneiii.cfg]
 
 #quartus_cpf --option=bitstream_compression=off -c output_files\cycloneiii_blinker.sof cycloneiii_blinker.rbf
 
-#openocd -f board/bemicro_cycloneiii.cfg -c "init" -c "pld load 0 cycloneiii_blinker.rbf"
+#openocd -f board/bemicro_cycloneiii.cfg -c "init" -c "pld load cycloneiii.pld cycloneiii_blinker.rbf"
 # "ipdbg -start -tap cycloneiii.tap -hub 0x00e -tool 0 -port 5555"
+
+
+set JTAGSPI_CHAIN_ID cycloneiii.pld
+source [find cpld/jtagspi.cfg]
diff --git a/tcl/board/certuspro_evaluation.cfg b/tcl/board/certuspro_evaluation.cfg
index 5ff2a1e..ba2f17c 100644
--- a/tcl/board/certuspro_evaluation.cfg
+++ b/tcl/board/certuspro_evaluation.cfg
@@ -12,3 +12,11 @@ transport select jtag
 adapter speed 10000
 
 source [find fpga/lattice_certuspro.cfg]
+
+#openocd -f board/certuspro_evaluation.cfg -c "init" -c "pld load certuspro.pld shared_folder/certuspro_blinker_impl_1.bit"
+
+set JTAGSPI_CHAIN_ID certuspro.pld
+source [find cpld/jtagspi.cfg]
+
+#jtagspi_init certuspro.pld "" -1
+#jtagspi_program shared_folder/certuspro_blinker_impl1.bit 0
diff --git a/tcl/board/digilent_cmod_s7.cfg b/tcl/board/digilent_cmod_s7.cfg
new file mode 100644
index 0000000..c52ee95
--- /dev/null
+++ b/tcl/board/digilent_cmod_s7.cfg
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# digilent CMOD S7
+# https://digilent.com/reference/programmable-logic/cmod-s7/reference-manual
+
+
+adapter driver ftdi
+ftdi channel 0
+ftdi layout_init 0x0008 0x008b
+ftdi vid_pid 0x0403 0x6010
+reset_config none
+transport select jtag
+
+adapter speed 10000
+
+source [find cpld/xilinx-xc7.cfg]
+
+# "ipdbg -start -tap xc7.tap -hub 0x02 -tool 0 -port 5555"
+#openocd -f board/digilent_cmod_s7.cfg -c "init" -c "pld load xc7.pld shared_folder/cmod_s7_fast.bit"
+
+set JTAGSPI_CHAIN_ID xc7.pld
+source [find cpld/jtagspi.cfg]
+
+#jtagspi_init xc7.pld "shared_folder/bscan_spi_xc7s25.bit" 0xab
+#jtagspi_program shared_folder/cmod_s7_fast.bit 0
diff --git a/tcl/board/ecp5_evaluation.cfg b/tcl/board/ecp5_evaluation.cfg
index 427037b..dd663f7 100644
--- a/tcl/board/ecp5_evaluation.cfg
+++ b/tcl/board/ecp5_evaluation.cfg
@@ -15,5 +15,11 @@ adapter speed 6000
 
 source [find fpga/lattice_ecp5.cfg]
 
-#openocd -f board/ecp5_evaluation.cfg -c "init" -c "pld load 0 shared_folder/ecp5_blinker_impl1.bit"
+#openocd -f board/ecp5_evaluation.cfg -c "init" -c "pld load ecp5.pld shared_folder/ecp5_blinker_impl1.bit"
 #ipdbg -start -tap ecp5.tap -hub 0x32 -port 5555 -tool 0
+
+set JTAGSPI_CHAIN_ID ecp5.pld
+source [find cpld/jtagspi.cfg]
+
+#jtagspi_init ecp5.pld "" -1
+#jtagspi_program shared_folder/ecp5_blinker_impl1_slow.bit 0
diff --git a/tcl/board/gatemate_eval.cfg b/tcl/board/gatemate_eval.cfg
index cc078a0..c4d3f3d 100644
--- a/tcl/board/gatemate_eval.cfg
+++ b/tcl/board/gatemate_eval.cfg
@@ -14,3 +14,9 @@ transport select jtag
 adapter speed 6000
 
 source [find fpga/gatemate.cfg]
+
+set JTAGSPI_CHAIN_ID gatemate.pld
+source [find cpld/jtagspi.cfg]
+
+#jtagspi_init gatemate.pld "" -1
+#jtagspi_program workspace/blink/blink_slow.cfg.bit 0
diff --git a/tcl/board/ti_am62pevm.cfg b/tcl/board/ti_am62pevm.cfg
new file mode 100644
index 0000000..2322b3d
--- /dev/null
+++ b/tcl/board/ti_am62pevm.cfg
@@ -0,0 +1,24 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments SK-AM62P: https://www.ti.com/lit/zip/sprr487
+#
+
+# AM62P SK/EVM has an xds110 onboard.
+source [find interface/xds110.cfg]
+
+transport select jtag
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 20
+
+if { ![info exists SOC] } {
+	set SOC am62p
+}
+
+source [find target/ti_k3.cfg]
+
+adapter speed 2500
diff --git a/tcl/board/ti_j784s4evm.cfg b/tcl/board/ti_j784s4evm.cfg
new file mode 100644
index 0000000..d23dc8c
--- /dev/null
+++ b/tcl/board/ti_j784s4evm.cfg
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments J784S4 EVM: https://www.ti.com/tool/J784S4XEVM
+# Texas Instruments SK-AM69: https://www.ti.com/tool/SK-AM69
+#
+
+# J784S4/AM69 SK/EVM has an xds110 onboard.
+source [find interface/xds110.cfg]
+
+transport select jtag
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 20
+
+if { ![info exists SOC] } {
+	set SOC j784s4
+}
+
+source [find target/ti_k3.cfg]
+
+adapter speed 2500
diff --git a/tcl/board/trion_t20_bga256.cfg b/tcl/board/trion_t20_bga256.cfg
index 045d63d..dc76d39 100644
--- a/tcl/board/trion_t20_bga256.cfg
+++ b/tcl/board/trion_t20_bga256.cfg
@@ -19,6 +19,11 @@ adapter speed 6000
 
 source [find fpga/efinix_trion.cfg]
 
-#openocd -f board/trion_t20_bga256.cfg -c "init" -c "pld load 0 outflow/trion_blinker.bit"
+#openocd -f board/trion_t20_bga256.cfg -c "init" -c "pld load trion.pld outflow/trion_blinker.bit"
 #ipdbg -start -tap trion.tap -hub 0x8 -port 5555 -tool 0
 
+set JTAGSPI_CHAIN_ID trion.pld
+source [find cpld/jtagspi.cfg]
+
+#jtagspi_init trion.pld "trion_jtagspi/outflow/trion_jtagspi.bit" 0xAB
+#jtagspi_program trion_blinker/outflow/trion_blinker.bin 0