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author | Antonio Borneo <borneo.antonio@gmail.com> | 2019-05-06 00:35:52 +0200 |
---|---|---|
committer | Antonio Borneo <borneo.antonio@gmail.com> | 2020-05-09 14:39:19 +0100 |
commit | e66bb9d3121eef35c312997aacb401847249a5cb (patch) | |
tree | 0d33157ce316c781aea167484999c3736bf1555f /src/target | |
parent | 9b29cb58acbd14ed831d68fce4d6e6a1728f8caf (diff) | |
download | riscv-openocd-e66bb9d3121eef35c312997aacb401847249a5cb.zip riscv-openocd-e66bb9d3121eef35c312997aacb401847249a5cb.tar.gz riscv-openocd-e66bb9d3121eef35c312997aacb401847249a5cb.tar.bz2 |
coding style: add parenthesis around the argument of sizeof
The script checkpatch available in new Linux kernel offers an
experimental feature for automatically fix the code in place.
While still experimental, the feature works quite well for simple
fixes, like parenthesis.
This patch has been created automatically with the script under
review for inclusion in OpenOCD, using the command:
find src/ -type f -exec ./tools/scripts/checkpatch.pl \
-q --types SIZEOF_PARENTHESIS --fix-inplace -f {} \;
Change-Id: I8adb325bdb0e13211f8bae8b4770ec1979c176bf
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5618
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Diffstat (limited to 'src/target')
-rw-r--r-- | src/target/arm11.c | 2 | ||||
-rw-r--r-- | src/target/arm11_dbgtap.c | 2 | ||||
-rw-r--r-- | src/target/arm_disassembler.c | 2 | ||||
-rw-r--r-- | src/target/arm_dpm.c | 4 | ||||
-rw-r--r-- | src/target/armv8_dpm.c | 4 | ||||
-rw-r--r-- | src/target/cortex_m.c | 6 | ||||
-rw-r--r-- | src/target/xscale.c | 20 |
7 files changed, 20 insertions, 20 deletions
diff --git a/src/target/arm11.c b/src/target/arm11.c index 51f2a33..10a1d6d 100644 --- a/src/target/arm11.c +++ b/src/target/arm11.c @@ -1105,7 +1105,7 @@ static int arm11_target_create(struct target *target, Jim_Interp *interp) return ERROR_COMMAND_SYNTAX_ERROR; } - arm11 = calloc(1, sizeof *arm11); + arm11 = calloc(1, sizeof(*arm11)); if (!arm11) return ERROR_FAIL; diff --git a/src/target/arm11_dbgtap.c b/src/target/arm11_dbgtap.c index 2232b3e..a758db5 100644 --- a/src/target/arm11_dbgtap.c +++ b/src/target/arm11_dbgtap.c @@ -1183,7 +1183,7 @@ int arm11_dpm_init(struct arm11_common *arm11, uint32_t didr) /* alloc enough to enable all breakpoints and watchpoints at once */ arm11->bpwp_actions = calloc(2 * (dpm->nbp + dpm->nwp), - sizeof *arm11->bpwp_actions); + sizeof(*arm11->bpwp_actions)); if (!arm11->bpwp_actions) return ERROR_FAIL; diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index 04c3922..55aaddd 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -2672,7 +2672,7 @@ static int evaluate_load_store_multiple_thumb(uint16_t opcode, instruction->type = ARM_STM; mnemonic = "STM"; } - snprintf(ptr_name, sizeof ptr_name, "r%i%s, ", Rn, wback); + snprintf(ptr_name, sizeof(ptr_name), "r%i%s, ", Rn, wback); } else {/* push/pop */ Rn = 13;/* SP */ if (L) { diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c index a01339c..495d63e 100644 --- a/src/target/arm_dpm.c +++ b/src/target/arm_dpm.c @@ -1096,8 +1096,8 @@ int arm_dpm_setup(struct arm_dpm *dpm) dpm->nbp = 1 + ((dpm->didr >> 24) & 0xf); dpm->nwp = 1 + ((dpm->didr >> 28) & 0xf); - dpm->dbp = calloc(dpm->nbp, sizeof *dpm->dbp); - dpm->dwp = calloc(dpm->nwp, sizeof *dpm->dwp); + dpm->dbp = calloc(dpm->nbp, sizeof(*dpm->dbp)); + dpm->dwp = calloc(dpm->nwp, sizeof(*dpm->dwp)); if (!dpm->dbp || !dpm->dwp) { free(dpm->dbp); diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c index 5be5272..a3edb7f 100644 --- a/src/target/armv8_dpm.c +++ b/src/target/armv8_dpm.c @@ -1471,10 +1471,10 @@ int armv8_dpm_setup(struct arm_dpm *dpm) /* FIXME add vector catch support */ dpm->nbp = 1 + ((dpm->didr >> 12) & 0xf); - dpm->dbp = calloc(dpm->nbp, sizeof *dpm->dbp); + dpm->dbp = calloc(dpm->nbp, sizeof(*dpm->dbp)); dpm->nwp = 1 + ((dpm->didr >> 20) & 0xf); - dpm->dwp = calloc(dpm->nwp, sizeof *dpm->dwp); + dpm->dwp = calloc(dpm->nwp, sizeof(*dpm->dwp)); if (!dpm->dbp || !dpm->dwp) { free(dpm->dbp); diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index af245df..27febd3 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -1980,7 +1980,7 @@ static void cortex_m_dwt_addreg(struct target *t, struct reg *r, const struct dw { struct dwt_reg_state *state; - state = calloc(1, sizeof *state); + state = calloc(1, sizeof(*state)); if (!state) return; state->addr = d->addr; @@ -2021,7 +2021,7 @@ fail0: return; } - cache = calloc(1, sizeof *cache); + cache = calloc(1, sizeof(*cache)); if (!cache) { fail1: free(cm->dwt_comparator_list); @@ -2029,7 +2029,7 @@ fail1: } cache->name = "Cortex-M DWT registers"; cache->num_regs = 2 + cm->dwt_num_comp * 3; - cache->reg_list = calloc(cache->num_regs, sizeof *cache->reg_list); + cache->reg_list = calloc(cache->num_regs, sizeof(*cache->reg_list)); if (!cache->reg_list) { free(cache); goto fail1; diff --git a/src/target/xscale.c b/src/target/xscale.c index f879a9c..edab4f9 100644 --- a/src/target/xscale.c +++ b/src/target/xscale.c @@ -156,7 +156,7 @@ static int xscale_jtag_set_instr(struct jtag_tap *tap, uint32_t new_instr, tap_s struct scan_field field; uint8_t scratch[4] = { 0 }; - memset(&field, 0, sizeof field); + memset(&field, 0, sizeof(field)); field.num_bits = tap->ir_length; field.out_value = scratch; buf_set_u32(scratch, 0, field.num_bits, new_instr); @@ -186,7 +186,7 @@ static int xscale_read_dcsr(struct target *target) buf_set_u32(&field0, 1, 1, xscale->hold_rst); buf_set_u32(&field0, 2, 1, xscale->external_debug_break); - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 3; fields[0].out_value = &field0; @@ -259,7 +259,7 @@ static int xscale_receive(struct target *target, uint32_t *buffer, int num_words path[1] = TAP_DRCAPTURE; path[2] = TAP_DRSHIFT; - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 3; uint8_t tmp; @@ -367,7 +367,7 @@ static int xscale_read_tx(struct target *target, int consume) noconsume_path[4] = TAP_DREXIT2; noconsume_path[5] = TAP_DRSHIFT; - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 3; fields[0].in_value = &field0_in; @@ -442,7 +442,7 @@ static int xscale_write_rx(struct target *target) XSCALE_DBGRX << xscale->xscale_variant, TAP_IDLE); - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 3; fields[0].out_value = &field0_out; @@ -598,7 +598,7 @@ static int xscale_write_dcsr(struct target *target, int hold_rst, int ext_dbg_br buf_set_u32(&field0, 1, 1, xscale->hold_rst); buf_set_u32(&field0, 2, 1, xscale->external_debug_break); - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 3; fields[0].out_value = &field0; @@ -666,7 +666,7 @@ static int xscale_load_ic(struct target *target, uint32_t va, uint32_t buffer[8] /* virtual address of desired cache line */ buf_set_u32(packet, 0, 27, va >> 5); - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 6; fields[0].out_value = &cmd; @@ -713,7 +713,7 @@ static int xscale_invalidate_ic_line(struct target *target, uint32_t va) /* virtual address of desired cache line */ buf_set_u32(packet, 0, 27, va >> 5); - memset(&fields, 0, sizeof fields); + memset(&fields, 0, sizeof(fields)); fields[0].num_bits = 6; fields[0].out_value = &cmd; @@ -1551,7 +1551,7 @@ static int xscale_deassert_reset(struct target *target) * coprocessors, trace data, etc. */ address = xscale->handler_address; - for (unsigned binary_size = sizeof xscale_debug_handler; + for (unsigned binary_size = sizeof(xscale_debug_handler); binary_size > 0; binary_size -= buf_cnt, buffer += buf_cnt) { uint32_t cache_line[8]; @@ -3004,7 +3004,7 @@ static int xscale_target_create(struct target *target, Jim_Interp *interp) { struct xscale_common *xscale; - if (sizeof xscale_debug_handler > 0x800) { + if (sizeof(xscale_debug_handler) > 0x800) { LOG_ERROR("debug_handler.bin: larger than 2kb"); return ERROR_FAIL; } |