aboutsummaryrefslogtreecommitdiff
path: root/src/target
diff options
context:
space:
mode:
authorAntonio Borneo <borneo.antonio@gmail.com>2019-05-06 01:03:52 +0200
committerAntonio Borneo <borneo.antonio@gmail.com>2020-05-09 14:39:29 +0100
commit4f459660a9dab3877f6f27127e565dd2b49b4ec7 (patch)
treefa7cd2c56bb304ee35ac1ec3a758f8fb88260167 /src/target
parente66bb9d3121eef35c312997aacb401847249a5cb (diff)
downloadriscv-openocd-4f459660a9dab3877f6f27127e565dd2b49b4ec7.zip
riscv-openocd-4f459660a9dab3877f6f27127e565dd2b49b4ec7.tar.gz
riscv-openocd-4f459660a9dab3877f6f27127e565dd2b49b4ec7.tar.bz2
coding style: avoid unnecessary line continuations
Line continuation, adding a backslash as last char of the line, is requested in multi-line macro definition, but is not necessary in the rest of C code. Remove it where present. Identified by checkpatch script from Linux kernel v5.1 using the command find src/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types LINE_CONTINUATIONS -f {} \; Change-Id: Id0c69e93456731717a7b290b16580e9f8ae741bc Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5619 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins
Diffstat (limited to 'src/target')
-rw-r--r--src/target/arc_cmd.c28
-rw-r--r--src/target/nds32_cmd.c4
-rw-r--r--src/target/nds32_disassembler.c2
-rw-r--r--src/target/riscv/riscv-013.c4
4 files changed, 19 insertions, 19 deletions
diff --git a/src/target/arc_cmd.c b/src/target/arc_cmd.c
index a8c3bb4..fad8ca9 100644
--- a/src/target/arc_cmd.c
+++ b/src/target/arc_cmd.c
@@ -383,7 +383,7 @@ static int jim_arc_get_core_reg(Jim_Interp *interp, int argc, Jim_Obj * const *a
/* Register number */
JIM_CHECK_RETVAL(arc_cmd_jim_get_uint32(&goi, &regnum));
if (regnum > CORE_REG_MAX_NUMBER || regnum == CORE_R61_NUM || regnum == CORE_R62_NUM) {
- Jim_SetResultFormatted(goi.interp, "Core register number %i " \
+ Jim_SetResultFormatted(goi.interp, "Core register number %i "
"is invalid. Must less then 64 and not 61 and 62.", regnum);
return JIM_ERR;
}
@@ -426,7 +426,7 @@ static int jim_arc_set_core_reg(Jim_Interp *interp, int argc, Jim_Obj * const *a
/* Register number */
JIM_CHECK_RETVAL(arc_cmd_jim_get_uint32(&goi, &regnum));
if (regnum > CORE_REG_MAX_NUMBER || regnum == CORE_R61_NUM || regnum == CORE_R62_NUM) {
- Jim_SetResultFormatted(goi.interp, "Core register number %i " \
+ Jim_SetResultFormatted(goi.interp, "Core register number %i "
"is invalid. Must less then 64 and not 61 and 62.", regnum);
return JIM_ERR;
}
@@ -447,9 +447,9 @@ static const struct command_registration arc_jtag_command_group[] = {
.name = "get-aux-reg",
.jim_handler = jim_arc_get_aux_reg,
.mode = COMMAND_EXEC,
- .help = "Get AUX register by number. This command does a " \
- "raw JTAG request that bypasses OpenOCD register cache "\
- "and thus is unsafe and can have unexpected consequences. "\
+ .help = "Get AUX register by number. This command does a "
+ "raw JTAG request that bypasses OpenOCD register cache "
+ "and thus is unsafe and can have unexpected consequences. "
"Use at your own risk.",
.usage = "arc jtag get-aux-reg <regnum>"
},
@@ -457,9 +457,9 @@ static const struct command_registration arc_jtag_command_group[] = {
.name = "set-aux-reg",
.jim_handler = jim_arc_set_aux_reg,
.mode = COMMAND_EXEC,
- .help = "Set AUX register by number. This command does a " \
- "raw JTAG request that bypasses OpenOCD register cache "\
- "and thus is unsafe and can have unexpected consequences. "\
+ .help = "Set AUX register by number. This command does a "
+ "raw JTAG request that bypasses OpenOCD register cache "
+ "and thus is unsafe and can have unexpected consequences. "
"Use at your own risk.",
.usage = "arc jtag set-aux-reg <regnum> <value>"
},
@@ -467,9 +467,9 @@ static const struct command_registration arc_jtag_command_group[] = {
.name = "get-core-reg",
.jim_handler = jim_arc_get_core_reg,
.mode = COMMAND_EXEC,
- .help = "Get/Set core register by number. This command does a " \
- "raw JTAG request that bypasses OpenOCD register cache "\
- "and thus is unsafe and can have unexpected consequences. "\
+ .help = "Get/Set core register by number. This command does a "
+ "raw JTAG request that bypasses OpenOCD register cache "
+ "and thus is unsafe and can have unexpected consequences. "
"Use at your own risk.",
.usage = "arc jtag get-core-reg <regnum> [<value>]"
},
@@ -477,9 +477,9 @@ static const struct command_registration arc_jtag_command_group[] = {
.name = "set-core-reg",
.jim_handler = jim_arc_set_core_reg,
.mode = COMMAND_EXEC,
- .help = "Get/Set core register by number. This command does a " \
- "raw JTAG request that bypasses OpenOCD register cache "\
- "and thus is unsafe and can have unexpected consequences. "\
+ .help = "Get/Set core register by number. This command does a "
+ "raw JTAG request that bypasses OpenOCD register cache "
+ "and thus is unsafe and can have unexpected consequences. "
"Use at your own risk.",
.usage = "arc jtag set-core-reg <regnum> [<value>]"
},
diff --git a/src/target/nds32_cmd.c b/src/target/nds32_cmd.c
index 88d8b45..7bf7e60 100644
--- a/src/target/nds32_cmd.c
+++ b/src/target/nds32_cmd.c
@@ -1007,7 +1007,7 @@ static const struct command_registration nds32_exec_command_handlers[] = {
.handler = handle_nds32_global_stop_command,
.mode = COMMAND_ANY,
.usage = "['on'|'off']",
- .help = "turn on/off global stop. After turning on, every load/store" \
+ .help = "turn on/off global stop. After turning on, every load/store"
"instructions will be stopped to check memory access.",
},
{
@@ -1015,7 +1015,7 @@ static const struct command_registration nds32_exec_command_handlers[] = {
.handler = handle_nds32_soft_reset_halt_command,
.mode = COMMAND_ANY,
.usage = "['on'|'off']",
- .help = "as issuing rest-halt, to use soft-reset-halt or not." \
+ .help = "as issuing rest-halt, to use soft-reset-halt or not."
"the feature is for backward-compatible.",
},
{
diff --git a/src/target/nds32_disassembler.c b/src/target/nds32_disassembler.c
index f27aba2..0cfd197 100644
--- a/src/target/nds32_disassembler.c
+++ b/src/target/nds32_disassembler.c
@@ -493,7 +493,7 @@ static int nds32_parse_mem(struct nds32 *nds32, uint32_t opcode, uint32_t addres
switch (sub_opcode & 0x7) {
case 0: /* LB */
nds32_parse_type_3(opcode, &(instruction->info.rt),
- &(instruction->info.ra), \
+ &(instruction->info.ra),
&(instruction->info.rb), &(instruction->info.imm));
instruction->type = NDS32_INSN_LOAD_STORE;
nds32_get_mapped_reg(nds32, instruction->info.ra, &val_ra);
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index e302941..4a323e4 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -3712,13 +3712,13 @@ int riscv013_test_compliance(struct target *target)
But at any rate, this is not legal and should cause an error. */
COMPLIANCE_WRITE(target, DMI_COMMAND, 0xAAAAAAAA);
COMPLIANCE_READ(target, &testvar_read, DMI_ABSTRACTCS);
- COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, \
+ COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED,
"Illegal COMMAND should result in UNSUPPORTED");
COMPLIANCE_WRITE(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR);
COMPLIANCE_WRITE(target, DMI_COMMAND, 0x55555555);
COMPLIANCE_READ(target, &testvar_read, DMI_ABSTRACTCS);
- COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED, \
+ COMPLIANCE_TEST(get_field(testvar_read, DMI_ABSTRACTCS_CMDERR) == CMDERR_NOT_SUPPORTED,
"Illegal COMMAND should result in UNSUPPORTED");
COMPLIANCE_WRITE(target, DMI_ABSTRACTCS, DMI_ABSTRACTCS_CMDERR);