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| author | Matthias Welwarsky <matthias.welwarsky@sysgo.com> | 2017-02-15 14:57:21 +0100 |
|---|---|---|
| committer | Paul Fertser <fercerpav@gmail.com> | 2017-02-24 09:15:18 +0000 |
| commit | 6fb9f2e3ee05d8ff6241e6d61f7de0e71afeb45c (patch) | |
| tree | 75627cf6d44965644737e7de93eb69e71ad1af8d /src/target/armv8.c | |
| parent | 095ff3d2103f9e8089b5b1fb0816d43874014e08 (diff) | |
| download | riscv-openocd-6fb9f2e3ee05d8ff6241e6d61f7de0e71afeb45c.zip riscv-openocd-6fb9f2e3ee05d8ff6241e6d61f7de0e71afeb45c.tar.gz riscv-openocd-6fb9f2e3ee05d8ff6241e6d61f7de0e71afeb45c.tar.bz2 | |
armv8: factor out generic bit set/clr for debug registers
introduce armv8_set_dbgreg_bits() function to make register
bit-field modifications easier to read.
Change-Id: I6b06f66262587fd301d848c9e0645e8327653de7
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3989
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Diffstat (limited to 'src/target/armv8.c')
| -rw-r--r-- | src/target/armv8.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/src/target/armv8.c b/src/target/armv8.c index 00ab6ed..2f1d5c1 100644 --- a/src/target/armv8.c +++ b/src/target/armv8.c @@ -1292,3 +1292,24 @@ int armv8_get_gdb_reg_list(struct target *target, } } } + +int armv8_set_dbgreg_bits(struct armv8_common *armv8, unsigned int reg, unsigned long mask, unsigned long value) +{ + uint32_t tmp; + + /* Read register */ + int retval = mem_ap_read_atomic_u32(armv8->debug_ap, + armv8->debug_base + reg, &tmp); + if (ERROR_OK != retval) + return retval; + + /* clear bitfield */ + tmp &= ~mask; + /* put new value */ + tmp |= value & mask; + + /* write new value */ + retval = mem_ap_write_atomic_u32(armv8->debug_ap, + armv8->debug_base + reg, tmp); + return retval; +} |