aboutsummaryrefslogtreecommitdiff
path: root/src/rtos/rtos_ucos_iii_stackings.c
diff options
context:
space:
mode:
authorSteven Stallion <stallion@squareup.com>2017-05-03 12:17:45 -0500
committerFreddie Chopin <freddie.chopin@gmail.com>2017-06-30 21:23:15 +0100
commite6fe4dddb97835a60cc512fea977550d7ae4056f (patch)
treeab7e427bb58a150332c45300652a18b2597f974f /src/rtos/rtos_ucos_iii_stackings.c
parent6767c1c1a31aac084467aa50d5810f7a4ca563f4 (diff)
downloadriscv-openocd-e6fe4dddb97835a60cc512fea977550d7ae4056f.zip
riscv-openocd-e6fe4dddb97835a60cc512fea977550d7ae4056f.tar.gz
riscv-openocd-e6fe4dddb97835a60cc512fea977550d7ae4056f.tar.bz2
rtos: style corrections for uCOS-III
This patch corrects a number of style infractions in RTOS support for uC/OS-III. These were missed during initial review last year prior to the 0.10.0 release. Change-Id: Ia2139f6ca381d4087fd8ee989f7a03ac474d7440 Signed-off-by: Steven Stallion <stallion@squareup.com> Reviewed-on: http://openocd.zylin.com/4120 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Diffstat (limited to 'src/rtos/rtos_ucos_iii_stackings.c')
-rw-r--r--src/rtos/rtos_ucos_iii_stackings.c55
1 files changed, 28 insertions, 27 deletions
diff --git a/src/rtos/rtos_ucos_iii_stackings.c b/src/rtos/rtos_ucos_iii_stackings.c
index f2f5564..c260b7f 100644
--- a/src/rtos/rtos_ucos_iii_stackings.c
+++ b/src/rtos/rtos_ucos_iii_stackings.c
@@ -1,5 +1,5 @@
/***************************************************************************
- * Copyright (C) 2016 by Square, Inc. *
+ * Copyright (C) 2017 by Square, Inc. *
* Steven Stallion <stallion@squareup.com> *
* *
* This program is free software; you can redistribute it and/or modify *
@@ -20,34 +20,35 @@
#include "config.h"
#endif
-#include "rtos.h"
-#include "rtos_standard_stackings.h"
-#include "target/armv7m.h"
+#include <helper/types.h>
+#include <rtos/rtos.h>
+#include <rtos/rtos_standard_stackings.h>
+#include <target/armv7m.h>
-static const struct stack_register_offset rtos_uCOS_III_Cortex_M_stack_offsets[ARMV7M_NUM_CORE_REGS] = {
- { 0x20, 32 }, /* r0 */
- { 0x24, 32 }, /* r1 */
- { 0x28, 32 }, /* r2 */
- { 0x2c, 32 }, /* r3 */
- { 0x00, 32 }, /* r4 */
- { 0x04, 32 }, /* r5 */
- { 0x08, 32 }, /* r6 */
- { 0x0c, 32 }, /* r7 */
- { 0x10, 32 }, /* r8 */
- { 0x14, 32 }, /* r9 */
- { 0x18, 32 }, /* r10 */
- { 0x1c, 32 }, /* r11 */
- { 0x30, 32 }, /* r12 */
- { -2, 32 }, /* sp */
- { 0x34, 32 }, /* lr */
- { 0x38, 32 }, /* pc */
- { 0x3c, 32 }, /* xPSR */
+static const struct stack_register_offset rtos_uCOS_III_Cortex_M_stack_offsets[] = {
+ { 0x20, 32 }, /* r0 */
+ { 0x24, 32 }, /* r1 */
+ { 0x28, 32 }, /* r2 */
+ { 0x2c, 32 }, /* r3 */
+ { 0x00, 32 }, /* r4 */
+ { 0x04, 32 }, /* r5 */
+ { 0x08, 32 }, /* r6 */
+ { 0x0c, 32 }, /* r7 */
+ { 0x10, 32 }, /* r8 */
+ { 0x14, 32 }, /* r9 */
+ { 0x18, 32 }, /* r10 */
+ { 0x1c, 32 }, /* r11 */
+ { 0x30, 32 }, /* r12 */
+ { -2, 32 }, /* sp */
+ { 0x34, 32 }, /* lr */
+ { 0x38, 32 }, /* pc */
+ { 0x3c, 32 }, /* xPSR */
};
const struct rtos_register_stacking rtos_uCOS_III_Cortex_M_stacking = {
- 0x40, /* stack_registers_size */
- -1, /* stack_growth_direction */
- ARMV7M_NUM_CORE_REGS, /* num_output_registers */
- rtos_generic_stack_align8, /* stack_alignment */
- rtos_uCOS_III_Cortex_M_stack_offsets /* register_offsets */
+ 0x40, /* stack_registers_size */
+ -1, /* stack_growth_direction */
+ ARRAY_SIZE(rtos_uCOS_III_Cortex_M_stack_offsets), /* num_output_registers */
+ rtos_generic_stack_align8, /* stack_alignment */
+ rtos_uCOS_III_Cortex_M_stack_offsets /* register_offsets */
};