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2020-02-12Repurpose misa.T to represent Ztsomisa-ztsoAndrew Waterman1-1/+5
2020-02-11The RVWMO is version 2.0 (#483)Palmer Dabbelt1-1/+1
2020-02-10Update chapters 2 and 7 for Hypervisor v0.6Andrew Waterman2-1/+146
2020-02-08Update hypervisor spec to v0.6Andrew Waterman2-248/+423
2020-01-24Clarify mvendorid.Bank vs. JEDEC bank numberAndrew Waterman1-0/+6
2020-01-20ignore write to "controlled" SBE and UBE. (#477)David-Horner1-2/+2
2020-01-13Correct left double quotes (#475)ansimita1-1/+1
2020-01-09Add Western Digital's SweRV EL2 and EH2 cores (#474)Thomas Wicki1-0/+2
2020-01-08Clarified that NMIs are interrupts, and should set mcause to have high bit set.Krste Asanovic1-3/+5
2020-01-07Fix PDF searching by changing e.g. {\em x}\,IE to {\em x}\/IEAndrew Waterman1-24/+24
2020-01-06Make mtimecmp code sequence legalAndrew Waterman1-3/+4
2019-12-27Fix FENCE.I cross-referenceAndrew Waterman1-1/+1
2019-12-27FENCE.I isn't in the I baseAndrew Waterman1-1/+1
2019-12-24Rephrase awkward sentenceAndrew Waterman1-2/+3
2019-12-24Clarify that access exceptions on jump targets are reported on the targetAndrew Waterman1-0/+4
2019-12-13Bump version number 20191214-draftAndrew Waterman1-1/+1
2019-12-13A extension v2.1 has been ratifiedRatified-IMAFDQCAndrew Waterman3-4/+6
2019-12-08multiplicand, not multiplier, is signedAndrew Waterman1-2/+2
2019-12-05Forgot to include frm as PPO source for FCVT.L[U].S/FCVT.S.L[U]Andrew Waterman1-4/+4
2019-11-20Add pass-through interrupt support and hgeie/hgeip registersAndrew Waterman2-42/+208
2019-11-20Update prefaceAndrew Waterman1-12/+22
2019-11-19MRET and SRET clear MPRV when leaving M-modeAndrew Waterman2-4/+5
2019-11-13"two-level translation" -> "two-stage translation"Andrew Waterman1-18/+20
2019-11-11Add note about negative htimedelta valuesAndrew Waterman1-0/+6
2019-11-11tweakAndrew Waterman1-2/+2
2019-11-10satp.PPN's WARLness is separate from physical address validityAndrew Waterman2-7/+8
2019-11-07Reserve satp fields when MODE=BareAndrew Waterman2-2/+13
2019-11-06Hypervisor tweaksAndrew Waterman2-33/+56
2019-11-06Convert samepage-commentary blocks to commentary blocksAndrew Waterman5-12/+8
2019-11-05Improve commentary environment page-break behaviorAndrew Waterman5-26/+34
2019-10-29hypervisor draft v0.5Andrew Waterman3-145/+1113
2019-10-22Merge branch 'pdonahue-ventana-unspecified'Andrew Waterman5-3/+31
2019-10-22Add platform note about UNSPECIFIED behavior decoding reserved opcodesAndrew Waterman1-0/+6
2019-10-22Merge branch 'unspecified' of https://github.com/pdonahue-ventana/riscv-isa-m...Andrew Waterman5-3/+25
2019-10-16clarify that extra PTE bits are reserved for _standard_ useAndrew Waterman1-2/+2
2019-10-14Describe what we mean by endiannessAndrew Waterman2-4/+24
2019-10-11Explicitly remark that SUM/MXR changes don't need an SFENCE.VMAAndrew Waterman1-0/+3
2019-10-11fix formattingAndrew Waterman1-1/+1
2019-10-11Incorporate feedback from Paul DonahueAndrew Waterman1-2/+2
2019-10-06Incorporate Anthony Coulter's feedbackAndrew Waterman1-3/+4
2019-10-02Address some of Derek's feedbacklrscAndrew Waterman1-15/+4
2019-10-02Fix editing error that allowed FENCE.I in LR/SC sequencesAndrew Waterman1-2/+3
2019-10-02Fix typoAndrew Waterman1-1/+1
2019-10-02Incorporate aspects of PR #444Andrew Waterman1-5/+17
2019-10-02Add a description of the reservability PMA.Josh Scheid1-9/+32
2019-10-02Use effective address consistentlyAndrew Waterman1-1/+1
2019-10-02Avoid using "virtual address" in normative text of unprivileged spec (#430)Andrew Waterman1-2/+5
2019-10-02Incorporate some of #416 and #418Andrew Waterman3-20/+60
2019-10-02More LR/SC feedbackAndrew Waterman1-4/+5
2019-10-02Move CAS code figure to the same page it's referenced onAndrew Waterman1-34/+32
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