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@@ -46,7 +46,7 @@ the NMI trap handler to save and restore the context that was
interrupted.
.Resumable NMI program counter `mnepc`.
-include::images/bytefield/mnepc.adoc[]
+include::images/bytefield/mnepc.edn[]
The `mnepc` CSR is an MXLEN-bit read-write register which on entry to
the NMI trap handler holds the PC of the instruction that took the