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| author | Andrew Waterman <andrew@sifive.com> | 2018-12-21 15:03:14 -0800 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2018-12-21 15:03:14 -0800 |
| commit | b78fd79cf2df7390162a4e77af772aa77bd8d740 (patch) | |
| tree | 007df7f646799e385ccc1dad294c6cbc8c7cddea /src | |
| parent | 84a7edb256d290cb436227c35a8a4f814fa41898 (diff) | |
| download | riscv-isa-manual-b78fd79cf2df7390162a4e77af772aa77bd8d740.zip riscv-isa-manual-b78fd79cf2df7390162a4e77af772aa77bd8d740.tar.gz riscv-isa-manual-b78fd79cf2df7390162a4e77af772aa77bd8d740.tar.bz2 | |
Add extension dependences to table
Closes #317
Diffstat (limited to 'src')
| -rw-r--r-- | src/naming.tex | 66 |
1 files changed, 34 insertions, 32 deletions
diff --git a/src/naming.tex b/src/naming.tex index 4fa1f05..e0d35b5 100644 --- a/src/naming.tex +++ b/src/naming.tex @@ -142,57 +142,59 @@ Table~\ref{isanametable} summarizes the standardized extension names. ~\\ \begin{table}[h] \center -\begin{tabular}{|l|c|} +\begin{tabular}{|l|c|c|} \hline -Subset & Name \\ +Subset & Name & Implies \\ \hline \hline -\multicolumn{2}{|c|}{Standard General-Purpose ISA}\\ +\multicolumn{3}{|c|}{Base ISA}\\ \hline -Integer & I \\ -Integer Multiplication and Division & M \\ -Atomics & A \\ -Single-Precision Floating-Point & F \\ -Double-Precision Floating-Point & D \\ -Control and Status Register Access & Zicsr \\ -Instruction-Fetch Fence & Zifencei \\ +Integer & I & \\ +Reduced Integer & E & \\ \hline -\multirow{2}{*}{General} & G = IMAFDZicsr\_Zifencei \\ - & (equivalently, IMADZifencei) \\ \hline -\multicolumn{2}{|c|}{Standard Unprivileged Extensions}\\ +\multicolumn{3}{|c|}{Standard Unprivileged Extensions}\\ \hline -Quad-Precision Floating-Point & Q \\ -Decimal Floating-Point & L \\ -16-bit Compressed Instructions & C \\ -Bit Manipulation & B \\ -Dynamic Languages & J \\ -Transactional Memory & T \\ -Packed-SIMD Extensions & P \\ -Vector Extensions & V \\ -User-Level Interrupts & N \\ -Misaligned Atomics & Zam \\ -Total Store Ordering & Ztso \\ +Integer Multiplication and Division & M & \\ +Atomics & A & \\ +Single-Precision Floating-Point & F & Zicsr \\ +Double-Precision Floating-Point & D & F \\ +Control and Status Register Access & Zicsr & \\ +Instruction-Fetch Fence & Zifencei & \\ \hline +General & G & IMADZifencei \\ \hline -\multicolumn{2}{|c|}{Standard Supervisor-Level Extensions}\\ +Quad-Precision Floating-Point & Q & D\\ +Decimal Floating-Point & L & \\ +16-bit Compressed Instructions & C & \\ +Bit Manipulation & B & \\ +Dynamic Languages & J & \\ +Transactional Memory & T & \\ +Packed-SIMD Extensions & P & \\ +Vector Extensions & V & \\ +User-Level Interrupts & N & \\ +Misaligned Atomics & Zam & A \\ +Total Store Ordering & Ztso & \\ \hline -Supervisor-level extension ``def'' & Sdef \\ \hline +\multicolumn{3}{|c|}{Standard Supervisor-Level Extensions}\\ \hline -\multicolumn{2}{|c|}{Standard Hypervisor-Level Extensions}\\ +Supervisor-level extension ``def'' & Sdef & \\ \hline -Hypervisor-level extension ``ghi'' & Hghi \\ \hline +\multicolumn{3}{|c|}{Standard Hypervisor-Level Extensions}\\ \hline -\multicolumn{2}{|c|}{Standard Machine-Level Extensions}\\ +Hypervisor-level extension ``ghi'' & Hghi & \\ \hline -Machine-level extension ``jkl'' & Zxmjkl \\ \hline +\multicolumn{3}{|c|}{Standard Machine-Level Extensions}\\ \hline -\multicolumn{2}{|c|}{Non-Standard Extensions}\\ +Machine-level extension ``jkl'' & Zxmjkl & \\ \hline -Non-standard extension ``mno'' & Xmno \\ +\hline +\multicolumn{3}{|c|}{Non-Standard Extensions}\\ +\hline +Non-standard extension ``mno'' & Xmno & \\ \hline \end{tabular} \caption{Standard ISA extension names. The table also defines the |