Table formatting

Formatting tables to match LaTeX.

1 files changed, 39 insertions, 19 deletions

diff --git a/src/priv-csrs.adoc b/src/priv-csrs.adoc
index e84cc05..5b425fd 100644
--- a/src/priv-csrs.adoc
+++ b/src/priv-csrs.adoc
@@ -184,31 +184,49 @@ only.
 |Number |Privilege |Name |Description
 4+^|Supervisor Trap Setup
 
-|`0x100` |SRW |`sstatus` |Supervisor status register.
-
-|`0x104` |SRW |`sie` |Supervisor interrupt-enable register.
-
-|`0x105` |SRW |`stvec` |Supervisor trap handler base address.
-
-|`0x106` |SRW |`scounteren` |Supervisor counter enable.
+|`0x100` +
+`0x104` +
+`0x105` +
+`0x106`
+|SRW +
+SRW +
+SRW +
+SRW
+|`sstatus` +
+`sie` +
+`stvec` +      
+`scounteren`
+|Supervisor status register. +
+Supervisor interrupt-enable register. +
+Supervisor trap handler base address. +
+Supervisor counter enable.
 
 4+^|Supervisor Configuration
 
-|`0x10A` |SRW |`senvcfg` |Supervisor environment configuration
-register.
+|`0x10A` |SRW |`senvcfg` |Supervisor environment configuration register.
 
 4+^|Supervisor Trap Handling
 
-|`0x140` |SRW |`sscratch` |Scratch register for supervisor trap
-handlers.
-
-|`0x141` |SRW |`sepc` |Supervisor exception program counter.
-
-|`0x142` |SRW |`scause` |Supervisor trap cause.
-
-|`0x143` |SRW |`stval` |Supervisor bad address or instruction.
-
-|`0x144` |SRW |`sip` |Supervisor interrupt pending.
+|`0x140` +
+`0x141` +
+`0x142` +
+`0x143` +
+`0x144` 
+|SRW +
+SRW +
+SRW +
+SRW +
+SRW 
+|`sscratch` +
+`sepc` +
+`scause` +
+`stval` +
+`sip`
+|Scratch register for supervisor trap handlers. +
+Supervisor exception program counter. +
+Supervisor trap cause. +
+Supervisor bad address or instruction. +
+Supervisor interrupt pending.
 
 4+^|Supervisor Protection and Translation
 
@@ -218,7 +236,9 @@ handlers.
 
 |`0x5A8` |SRW |`scontext` |Supervisor-mode context register.
 |===
+
 <<<
+    
 [[hcsrnames]]
 .Currently allocated RISC-V hypervisor and VS CSR addresses.
 [%autowidth,float="center",align="center",cols="<,<,<,<",options="header"]