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| author | Andrew Waterman <andrew@sifive.com> | 2019-06-21 17:08:03 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2019-06-21 17:08:03 -0700 |
| commit | 70ff7c2cb5ae63ea230a362f2a9f04795ffe30f1 (patch) | |
| tree | 6f975b4c111993e7153be0662b111a9e0ae95a51 /src/preface.tex | |
| parent | 1e8c2e1fc2c1fd4a5b9177869aee8ace4b5879bb (diff) | |
| download | riscv-isa-manual-70ff7c2cb5ae63ea230a362f2a9f04795ffe30f1.zip riscv-isa-manual-70ff7c2cb5ae63ea230a362f2a9f04795ffe30f1.tar.gz riscv-isa-manual-70ff7c2cb5ae63ea230a362f2a9f04795ffe30f1.tar.bz2 | |
Changes to unprivileged spec for bi[g]-endian support
Diffstat (limited to 'src/preface.tex')
| -rw-r--r-- | src/preface.tex | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/preface.tex b/src/preface.tex index 2a5a539..86ecf84 100644 --- a/src/preface.tex +++ b/src/preface.tex @@ -47,6 +47,13 @@ The document contains the following versions of the RISC-V ISA modules: \end{table} } +The changes in this version of the document include: +\vspace{-0.2in} +\begin{itemize} +\parskip 0pt +\itemsep 1pt +\item Defined big-endian ISA variant. +\end{itemize} \section*{Preface to Document Version 20190608-Base-Ratified} |