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| author | elisa <elisa@riscv.org> | 2021-10-05 08:46:06 -0700 |
|---|---|---|
| committer | elisa <elisa@riscv.org> | 2021-10-05 08:46:06 -0700 |
| commit | c6ae16c883f6b937c9696c427f046bfc9f8b25f6 (patch) | |
| tree | 4ad5a4fa56d2f0dc35285b9bc3738f8ea2f1d50d /src/machine.tex | |
| parent | bc10f8a4ef09e40dcb7aa278c99b240469e4f20c (diff) | |
| parent | 22c8813c7a05bd9d54892995b43e95f25f9df883 (diff) | |
| download | riscv-isa-manual-c6ae16c883f6b937c9696c427f046bfc9f8b25f6.zip riscv-isa-manual-c6ae16c883f6b937c9696c427f046bfc9f8b25f6.tar.gz riscv-isa-manual-c6ae16c883f6b937c9696c427f046bfc9f8b25f6.tar.bz2 | |
Merge branch 'master' of github.com:riscv/riscv-isa-manual into convert2adoc
Diffstat (limited to 'src/machine.tex')
| -rw-r--r-- | src/machine.tex | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/machine.tex b/src/machine.tex index 043d584..2ae1756 100644 --- a/src/machine.tex +++ b/src/machine.tex @@ -3346,7 +3346,8 @@ PMP entries are described by an 8-bit configuration register and one MXLEN-bit address register. Some PMP settings additionally use the address register associated with the preceding PMP entry. Up to 64 PMP entries are supported. -Implementations may implement zero, 16, or 64 PMP CSRs. +Implementations may implement zero, 16, or 64 PMP CSRs; the lowest-numbered +PMP CSRs must be implemented first. All PMP CSR fields are \warl\ and may be hardwired to zero. PMP CSRs are only accessible to M-mode. |