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| author | Dylan Reid <dgreid@dylanreid.com> | 2022-01-14 21:47:47 -0800 |
|---|---|---|
| committer | Bill Traynor <btraynor@gmail.com> | 2022-07-26 11:50:14 -0400 |
| commit | 3725b1aa5133bf12505c6fec46cb36a515238c32 (patch) | |
| tree | fa844855ac82641086d0f9c4eacb855996e4c3a6 /src/hypervisor.tex | |
| parent | 9ed22b7a85d77364936b55c654ba34995399c88c (diff) | |
| download | riscv-isa-manual-3725b1aa5133bf12505c6fec46cb36a515238c32.zip riscv-isa-manual-3725b1aa5133bf12505c6fec46cb36a515238c32.tar.gz riscv-isa-manual-3725b1aa5133bf12505c6fec46cb36a515238c32.tar.bz2 | |
hypervisor: Add Sv57 to &x4 address witdth list (#811)
The Sv57 example wasn't included in the list of expanded widths for the
*x4 modes.
Signed-off-by: Dylan Reid <dgreid@rivosinc.com>
Co-authored-by: Dylan Reid <dgreid@rivosinc.com>
Diffstat (limited to 'src/hypervisor.tex')
| -rw-r--r-- | src/hypervisor.tex | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/hypervisor.tex b/src/hypervisor.tex index c65b78e..8b10349 100644 --- a/src/hypervisor.tex +++ b/src/hypervisor.tex @@ -2526,7 +2526,7 @@ Sv48x4, or Sv57x4, G-stage address translation is a variation on the usual page-based virtual address translation scheme of Sv32, Sv39, Sv48, or Sv57, respectively. In each case, the size of the incoming address is widened by 2~bits (to 34, 41, -or 50 bits). +50, or 59 bits). To accommodate the 2~extra bits, the root page table (only) is expanded by a factor of four to be 16~KiB instead of the usual 4~KiB. Matching its larger size, the root page table also must be aligned to a 16~KiB |