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| author | Andrew Waterman <andrew@sifive.com> | 2024-04-26 19:08:57 -0700 |
|---|---|---|
| committer | Andrew Waterman <andrew@sifive.com> | 2024-04-26 19:08:57 -0700 |
| commit | 3d703f3f2d8fb5ebdbc8ee6be508661c318d451b (patch) | |
| tree | 1e36cd8bc8cf29bb3c68a3b5f681c6aca28a5283 | |
| parent | 6d137a77e7e8619bf6eaf36a27674ec5bea08b21 (diff) | |
| download | riscv-isa-manual-3d703f3f2d8fb5ebdbc8ee6be508661c318d451b.zip riscv-isa-manual-3d703f3f2d8fb5ebdbc8ee6be508661c318d451b.tar.gz riscv-isa-manual-3d703f3f2d8fb5ebdbc8ee6be508661c318d451b.tar.bz2 | |
Fix inconsistent formatting
| -rw-r--r-- | src/intro.adoc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/intro.adoc b/src/intro.adoc index 47e3b7c..67b4cf2 100644 --- a/src/intro.adoc +++ b/src/intro.adoc @@ -471,7 +471,7 @@ instructions have larger values of ILEN. <<instlengthcode>> illustrates the standard RISC-V instruction-length encoding convention. All the 32-bit -instructions in the base ISA have their lowest two bits set to "11". The +instructions in the base ISA have their lowest two bits set to `11`. The optional compressed 16-bit instruction-set extensions have their lowest two bits equal to `00`, `01`, or `10`. |