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authorBill Traynor <wmat@riscv.org>2022-11-27 15:30:26 -0500
committerBill Traynor <wmat@riscv.org>2022-11-27 15:30:26 -0500
commit01c562371c8afd3a0d6431eefa9a5f84eacc74ae (patch)
tree30c0b66fb76dcb0c7aba7c9f18c48af359e7f102
parent0180d051e0d359ccdad0c9212110d0eb77556a03 (diff)
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More playing with bitfield lengths to get labels to fit.
Shrunk bitfield lengths to make field text fit and right hand labels fit. Removed all image placeholder.
-rw-r--r--src/images/wavedrom/immediate.adoc10
-rw-r--r--src/rv32.adoc14
2 files changed, 5 insertions, 19 deletions
diff --git a/src/images/wavedrom/immediate.adoc b/src/images/wavedrom/immediate.adoc
index bc3c2a7..8d3a432 100644
--- a/src/images/wavedrom/immediate.adoc
+++ b/src/images/wavedrom/immediate.adoc
@@ -8,7 +8,7 @@
{bits: 4, name: 'inst[20]'},
{bits: 5, name: 'inst[24:21]'},
{bits: 5, name: 'inst[30:25]'},
- {bits: 21, name: '— inst[31] —', type: 7},
+ {bits: 15, name: '— inst[31] —', type: 7},
], config:{label:{right: 'I-immediate'}}}
....
//#### S-immediate
@@ -19,7 +19,7 @@
{bits: 4, name: 'inst[7]'},
{bits: 5, name: 'inst[11:8]'},
{bits: 6, name: 'inst[30:25]'},
- {bits: 21, name: '— inst[31] —', type: 7},
+ {bits: 15, name: '— inst[31] —', type: 7},
], config:{label:{right: 'S-immediate'}}}
....
//#### B-immediate
@@ -31,7 +31,7 @@
{bits: 4, name: 'inst[11:8]'},
{bits: 5, name: 'inst[30:25]'},
{bits: 4, name: 'inst[7]'},
- {bits: 20, name: '— inst[31] —', type: 7},
+ {bits: 15, name: '— inst[31] —', type: 7},
], config:{label:{right: 'B-immediate'}}}
....
//#### U-immediate
@@ -39,7 +39,7 @@
[wavedrom, ,]
....
{reg: [
- {bits: 12, name: '0', type: 5},
+ {bits: 10, name: '0', type: 5},
{bits: 8, name: 'inst[19:12]'},
{bits: 11, name: 'inst[30:20]'},
{bits: 5, name: 'inst[31]', type: 7},
@@ -55,6 +55,6 @@
{bits: 6, name: 'inst[30:25]'},
{bits: 5, name: 'inst[20]'},
{bits: 6, name: 'inst[19:12]'},
- {bits: 12, name: '— inst[31] —', type: 7},
+ {bits: 10, name: '— inst[31] —', type: 7},
], config:{label:{right: 'J-immediate'}}}
....
diff --git a/src/rv32.adoc b/src/rv32.adoc
index 8fccaba..ba02728 100644
--- a/src/rv32.adoc
+++ b/src/rv32.adoc
@@ -177,7 +177,6 @@ bit 31 of the instruction to speed sign-extension circuitry.
include::images/wavedrom/instruction_formats.adoc[]
[[base_instr]]
.RISC-V base instruction formats
-image::image_placeholder.png[]
Each immediate subfield in <<base_instr>> above is labeled with the bit position (imm[x]) in the immediate value being produced, rather than the bit position within the instruction’s immediate field as is usually done.
@@ -207,7 +206,6 @@ on the handling of immediates, as shown in <<baseinstformatsimm>>.
include::images/wavedrom/immediate_variants.adoc[]
[[baseinstformatsimm]]
.RISC-V base instruction formats.
-image::image_placeholder.png[]
The only difference between the S and B formats is that the 12-bit
immediate field is used to encode branch offsets in multiples of 2 in
@@ -229,7 +227,6 @@ instruction bit (inst[_y_]) produces each bit of the immediate value.
include::images/wavedrom/immediate.adoc[]
[[immtypes]]
.Immediate variants for I, S, B, U, and J
-image::image_placeholder.png[]
[NOTE]
====
@@ -296,7 +293,6 @@ comparing the results of ADD and ADDW on the operands.
include::images/wavedrom/integer_computational.adoc[]
.Integer Computational Instructions
-image::image_placeholder.png[]
ADDI adds the sign-extended 12-bit immediate to register _rs1_.
Arithmetic overflow is ignored and the result is simply the low XLEN
@@ -319,7 +315,6 @@ inversion of register _rs1_ (assembler pseudoinstruction NOT _rd, rs_).
include::images/wavedrom/int-comp-slli-srli-srai.adoc[]
[[int-comp-slli-srli-srai]]
.Integer register-immediate, SLLI, SRLI, SRAI
-image::image_placeholder.png[]
Shifts by a constant are encoded as a specialization of the I-type
format. The operand to be shifted is in _rs1_, and the shift amount is
@@ -332,7 +327,6 @@ original sign bit is copied into the vacated upper bits).
include::images/wavedrom/int-comp-lui-aiupc.adoc[]
[[int-comp-lui-aiupc]]
.Integer register-immediate, U-immediate
-image::image_placeholder.png[]
LUI (load upper immediate) is used to build 32-bit constants and uses
the U-type format. LUI places the 32-bit U-immediate value into the
@@ -373,7 +367,6 @@ operation.
include::images/wavedrom/int_reg-reg.adoc[]
[[int-reg-reg]]
.Integer register-register
-image::image_placeholder.png[]
ADD performs the addition of _rs1_ and _rs2_. SUB performs the
subtraction of _rs2_ from _rs1_. Overflows are ignored and the low XLEN
@@ -393,7 +386,6 @@ the lower 5 bits of register _rs2_.
include::images/wavedrom/nop.adoc[]
[[nop]]
.NOP instructions
-image::image_placeholder.png[]
The NOP instruction does not change any architecturally visible state,
except for advancing the `pc` and incrementing any applicable
@@ -458,7 +450,6 @@ a JAL with _rd_=`x0`.
include::images/wavedrom/ct-unconditional.adoc[]
[[ct-unconditional]]
.The unconditional-jump instruction, JAL
-image::image_placeholder.png[]
The indirect jump instruction JALR (jump and link register) uses the
I-type encoding. The target address is obtained by adding the
@@ -471,7 +462,6 @@ required.
include::images/wavedrom/ct-unconditional-2.adoc[]
[[ct-unconditional-2]]
.The indirect unconditional-jump instruction, JALR
-image::image_placeholder.png[]
[NOTE]
====
@@ -567,7 +557,6 @@ give the target address. The conditional branch range is
include::images/wavedrom/ct-conditional.adoc[]
[[ct-conditional]]
.Conditional branches
-image::image_placeholder.png[]
Branch instructions compare two registers. BEQ and BNE take the branch
if registers _rs1_ and _rs2_ are equal or unequal respectively. BLT and
@@ -702,7 +691,6 @@ memory byte addresses to the less-significant register bytes.
include::images/wavedrom/load_store.adoc[]
[[load-store,load and store]]
.Load and store instructions
-image::image_placeholder.png[]
Load and store instructions transfer a value between the registers and
memory. Loads are encoded in the I-type format and stores are S-type.
@@ -792,7 +780,6 @@ are aligned.
include::images/wavedrom/mem_order.adoc[]
[[mem-order]]
.Memory ordering instructions
-image::image_placeholder.png[]
The FENCE instruction is used to order device I/O and memory accesses as
viewed by other RISC-V harts and external devices or coprocessors. Any
@@ -901,7 +888,6 @@ hardware.
include::images/wavedrom/env_call-breakpoint.adoc[]
[[env-call]]
.Evironment call and breakpoint instructions
-image::image_placeholder.png[]
These two instructions cause a precise requested trap to the supporting
execution environment.