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authorAndrew Waterman <andrew@sifive.com>2017-05-07 14:51:43 -0700
committerAndrew Waterman <andrew@sifive.com>2017-05-07 14:52:08 -0700
commit562dccda796e2a12ea4fd8aa4d5f49a887faa73f (patch)
tree77224b26d9b8769b9be848866988e733a58fcd4f
parentfbb2a8533d18a80d67a2489c8c7850d3102df268 (diff)
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Misaligned superpages generate page-fault exceptions
h/t Anthony Coulter
-rw-r--r--src/supervisor.tex23
1 files changed, 10 insertions, 13 deletions
diff --git a/src/supervisor.tex b/src/supervisor.tex
index a16504a..2450a28 100644
--- a/src/supervisor.tex
+++ b/src/supervisor.tex
@@ -1155,21 +1155,18 @@ follows:
current privilege mode and the value of the SUM and MXR fields of
the {\tt mstatus} register. If not, stop and raise a page-fault exception.
-\item If $pte.a=0$, perform either of the following two actions:
- \begin{itemize}
- \item Atomically with respect to the permission check in step 5,
- set $pte.a$ to 1. If this access violates a PMA or PMP check, raise
- an access exception.
- \item Raise a page-fault exception.
- \end{itemize}
+\item If $i>0$ and $pa.ppn[i-1:0]\neq 0$, this is a misaligned superpage;
+ stop and raise a page-fault exception.
-\item If the memory access is a store and $pte.d=0$, perform either of the
- following two actions:
+\item If $pte.a=0$, or if the memory access is a store and $pte.d=0$, either
+ raise a page-fault exception or:
\begin{itemize}
- \item Atomically with respect to the permission check in step 5 and
- the access to $pte.a$ in step 6, set $pte.d$ to 1. If this access
- violates a PMA or PMP check, raise an access exception.
- \item Raise a page-fault exception.
+ \item Set $pte.a$ to 1 and, if the memory access is a store, also set
+ $pte.d$ to 1.
+ \item If this access violates a PMA or PMP check, raise an access exception.
+ \item This update and the loading of $pte$ in step 2 must be atomic; in
+ particular, no intervening store to the PTE may be perceived to have
+ occurred in-between.
\end{itemize}
\item The translation is successful. The translated physical address is