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AgeCommit message (Expand)AuthorFilesLines
2017-05-07Add compiled specsriscv-user-2.2riscv-priv-1.10Andrew Waterman6-0/+0
2017-05-07user spec -> 2.2; priv spec -> 1.10Andrew Waterman3-3/+3
2017-05-07SB/UJ -> B/JAndrew Waterman2-5/+5
2017-05-07C -> 2.0Andrew Waterman2-8/+3
2017-05-07Remove SBI chapterAndrew Waterman2-1/+2
2017-05-07Add missing preface noteAndrew Waterman1-0/+2
2017-05-07Clarify compatibility note on priv spec coverAndrew Waterman1-2/+4
2017-05-07Add stvec vectoringAndrew Waterman2-9/+48
2017-05-07Misaligned superpages generate page-fault exceptionsAndrew Waterman1-13/+10
2017-05-07Fix typosHairyFotr5-7/+7
2017-05-07Actioned Robert Watson's feedback.Krste Asanovic2-44/+51
2017-05-06Forgot to add note to preface.Krste Asanovic1-3/+5
2017-05-06Clarified expected use of XS to summarize additional extensionKrste Asanovic2-5/+5
2017-05-06Added note about dropping config string for now. Some other cleanups.Krste Asanovic3-8/+11
2017-05-06Fixed some lingering references to bad address register.Krste Asanovic2-4/+4
2017-05-06Cleaned up references to hypervisor.Krste Asanovic2-9/+6
2017-05-06Fix typoAndrew Waterman1-1/+1
2017-05-06Updated to define and use hart more consistently.Krste Asanovic2-50/+77
2017-05-06Cleaned up description of SEIP/UEIP.Krste Asanovic2-25/+39
2017-05-06Added citation and cleaned up front page.Krste Asanovic2-55/+50
2017-05-05First cut at N extension.Krste Asanovic1-0/+124
2017-05-05Merge branch 'master' of github.com:riscv/riscv-isa-manualKrste Asanovic3-12/+46
2017-05-05Merge branch 'master' of github.com:riscv/riscv-isa-manualKrste Asanovic4-16/+26
2017-05-05Attempt to explain SEIP disciplineAndrew Waterman3-12/+46
2017-05-05Remove option to hardwire UXL/SXL to 0Andrew Waterman2-14/+17
2017-05-05PPN LSBs must be clear for superpage PTEsAndrew Waterman1-1/+6
2017-05-05Merge branch 'master' of github.com:riscv/riscv-isa-manualKrste Asanovic1-3/+4
2017-05-05Remove redundant clause in SFENCE.VMA descriptionAndrew Waterman1-3/+1
2017-05-04Reserve D/A/U bitsAndrew Waterman1-0/+3
2017-05-03Moved chapters into canonical extension listing order.Krste Asanovic3-3/+3
2017-05-03Added note indicating that the P extension might be reworkedKrste Asanovic2-0/+12
2017-05-03Reordered chapters to be somewhat more logical.Krste Asanovic3-6/+7
2017-05-03Clarified result of REM*W on divide by zero.Krste Asanovic1-15/+18
2017-05-03Changed front page of spec to follow move to Creative Commons License.Krste Asanovic2-10/+34
2017-05-02Clarify commentaryAndrew Waterman1-1/+1
2017-05-02Incorporate Anthony Coulter's feedbackAndrew Waterman2-10/+25
2017-04-27Improve ECALL textAndrew Waterman1-1/+1
2017-04-27Describe ECALL/EBREAK operation in privileged architectureAndrew Waterman2-1/+74
2017-04-25Clean up JALR hint textAndrew Waterman2-7/+9
2017-04-24Modified behavior of JALR hint bits to better support macro-op fusion of LUI;...Krste Asanovic3-9/+53
2017-04-20Make mcause table easier to understandAndrew Waterman1-6/+6
2017-04-20Improve stval/mtval warl textAndrew Waterman2-10/+16
2017-04-17Recommend LR for sequentially consistent loadsAndrew Waterman1-6/+6
2017-04-17mepc, sepc, mtval, and stval are WARLAndrew Waterman2-0/+20
2017-04-16Define the behavior of FMA(inf, 0, qNaN)Andrew Waterman2-0/+9
2017-04-16Formatting fixesAndrew Waterman1-5/+5
2017-04-14Fix FMV.X.W/FMV.W.X in instruction listingsAndrew Waterman1-2/+2
2017-04-13Renamed FMV.X.S/S.X to FMV.X.W/W.X to be more consistent with load/store inst...Krste Asanovic4-17/+29
2017-04-13Clarified transfers out of f registers and conversion instructions.Krste Asanovic1-1/+10
2017-04-13Added the NaN-boxing scheme for narrower floating-point values held in wider ...Krste Asanovic4-38/+97
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