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| author | Palmer Dabbelt <palmer@sifive.com> | 2018-10-25 10:50:04 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2018-10-25 11:03:11 -0700 |
| commit | 4502772cc5085e88272b7e85247807b00662000c (patch) | |
| tree | 33b051ceddbbd95490ac30951037114029c579a3 | |
| parent | 6c63ef1513696f3d096508e34ac2bc4b65e576a8 (diff) | |
| download | riscv-isa-manual-cnop.zip riscv-isa-manual-cnop.tar.gz riscv-isa-manual-cnop.tar.bz2 | |
The performance counters must respect "c.nop"cnop
The non-compressed "nop" mentions that performance counters are modified
by the instruction, but the text of the compressed instruction make it
sound like that's not the case.
| -rw-r--r-- | src/c.tex | 3 |
1 files changed, 2 insertions, 1 deletions
@@ -1099,7 +1099,8 @@ C.NOP & 0 & 0 & 0 & C1 \\ \end{center} C.NOP is a CI-format instruction that does not change any user-visible state, -except for advancing the {\tt pc}. C.NOP expands to {\tt nop}. +except for advancing the {\tt pc} and incrementing any applicable performance +counters. C.NOP expands to {\tt nop}. \subsection*{Breakpoint Instruction} \vspace{-0.4in} |