diff options
Diffstat (limited to 'isa')
| -rw-r--r-- | isa/Makefile | 12 | ||||
| -rw-r--r-- | isa/rv32uzbkb/Makefrag | 12 | ||||
| -rw-r--r-- | isa/rv32uzbkb/brev8.S | 7 | ||||
| -rw-r--r-- | isa/rv32uzbkb/pack.S | 68 | ||||
| -rw-r--r-- | isa/rv32uzbkb/packh.S | 68 | ||||
| -rw-r--r-- | isa/rv32uzbkb/unzip.S | 61 | ||||
| -rw-r--r-- | isa/rv32uzbkb/zip.S | 61 | ||||
| -rw-r--r-- | isa/rv32uzbkx/Makefrag | 9 | ||||
| -rw-r--r-- | isa/rv32uzbkx/xperm4.S | 74 | ||||
| -rw-r--r-- | isa/rv32uzbkx/xperm8.S | 72 | ||||
| -rw-r--r-- | isa/rv64uzbkb/Makefrag | 11 | ||||
| -rw-r--r-- | isa/rv64uzbkb/brev8.S | 56 | ||||
| -rw-r--r-- | isa/rv64uzbkb/pack.S | 76 | ||||
| -rw-r--r-- | isa/rv64uzbkb/packh.S | 68 | ||||
| -rw-r--r-- | isa/rv64uzbkb/packw.S | 68 | ||||
| -rw-r--r-- | isa/rv64uzbkx/Makefrag | 9 | ||||
| -rw-r--r-- | isa/rv64uzbkx/xperm4.S | 72 | ||||
| -rw-r--r-- | isa/rv64uzbkx/xperm8.S | 71 |
18 files changed, 873 insertions, 2 deletions
diff --git a/isa/Makefile b/isa/Makefile index 9eef64d..0f0106f 100644 --- a/isa/Makefile +++ b/isa/Makefile @@ -18,6 +18,8 @@ include $(src_dir)/rv64uzfh/Makefrag include $(src_dir)/rv64uzba/Makefrag include $(src_dir)/rv64uzbb/Makefrag include $(src_dir)/rv64uzbc/Makefrag +include $(src_dir)/rv64uzbkb/Makefrag +include $(src_dir)/rv64uzbkx/Makefrag include $(src_dir)/rv64uzbs/Makefrag include $(src_dir)/rv64si/Makefrag include $(src_dir)/rv64ssvnapot/Makefrag @@ -35,6 +37,8 @@ include $(src_dir)/rv32uzfh/Makefrag include $(src_dir)/rv32uzba/Makefrag include $(src_dir)/rv32uzbb/Makefrag include $(src_dir)/rv32uzbc/Makefrag +include $(src_dir)/rv32uzbkb/Makefrag +include $(src_dir)/rv32uzbkx/Makefrag include $(src_dir)/rv32uzbs/Makefrag include $(src_dir)/rv32si/Makefrag include $(src_dir)/rv32mi/Makefrag @@ -70,10 +74,10 @@ vpath %.S $(src_dir) $(RISCV_OBJDUMP) $< > $@ %.out: % - $(RISCV_SIM) --isa=rv64gch_ziccid_zfh_zicboz_svnapot_zicntr_zba_zbb_zbc_zbs_zicclsm $< 2> $@ + $(RISCV_SIM) --isa=rv64gch_ziccid_zfh_zicboz_svnapot_zicntr_zba_zbb_zbkb_zbkx_zbc_zbs_zicclsm $< 2> $@ %.out32: % - $(RISCV_SIM) --isa=rv32gc_ziccid_zfh_zicboz_svnapot_zicntr_zba_zbb_zbc_zbs_zicclsm $< 2> $@ + $(RISCV_SIM) --isa=rv32gc_ziccid_zfh_zicboz_svnapot_zicntr_zba_zbb_zbkb_zbkx_zbc_zbs_zicclsm $< 2> $@ define compile_template @@ -111,6 +115,8 @@ $(eval $(call compile_template,rv64uzfh,-march=rv64g_zfh -mabi=lp64d)) $(eval $(call compile_template,rv64uzba,-march=rv64g_zba -mabi=lp64d)) $(eval $(call compile_template,rv64uzbb,-march=rv64g_zbb -mabi=lp64d)) $(eval $(call compile_template,rv64uzbc,-march=rv64g_zbc -mabi=lp64d)) +$(eval $(call compile_template,rv64uzbkb,-march=rv64g_zbkb -mabi=lp64)) +$(eval $(call compile_template,rv64uzbkx,-march=rv64g_zbkx -mabi=lp64)) $(eval $(call compile_template,rv64uzbs,-march=rv64g_zbs -mabi=lp64d)) $(eval $(call compile_template,rv64mzicbo,-march=rv64g_zicboz -mabi=lp64d)) $(eval $(call compile_template,rv64si,-march=rv64g -mabi=lp64d)) @@ -128,6 +134,8 @@ $(eval $(call compile_template,rv32uzfh,-march=rv32g_zfh -mabi=ilp32)) $(eval $(call compile_template,rv32uzba,-march=rv32g_zba -mabi=ilp32)) $(eval $(call compile_template,rv32uzbb,-march=rv32g_zbb -mabi=ilp32)) $(eval $(call compile_template,rv32uzbc,-march=rv32g_zbc -mabi=ilp32)) +$(eval $(call compile_template,rv32uzbkb,-march=rv32g_zbkb -mabi=ilp32)) +$(eval $(call compile_template,rv32uzbkx,-march=rv32g_zbkx -mabi=ilp32)) $(eval $(call compile_template,rv32uzbs,-march=rv32g_zbs -mabi=ilp32)) $(eval $(call compile_template,rv32si,-march=rv32g -mabi=ilp32)) $(eval $(call compile_template,rv32mi,-march=rv32g -mabi=ilp32)) diff --git a/isa/rv32uzbkb/Makefrag b/isa/rv32uzbkb/Makefrag new file mode 100644 index 0000000..1159aac --- /dev/null +++ b/isa/rv32uzbkb/Makefrag @@ -0,0 +1,12 @@ +rv32uzbkb_sc_tests = \ + brev8 \ + pack \ + packh \ + unzip \ + zip + +rv32uzbkb_p_tests = $(addprefix rv32uzbkb-p-, $(rv32uzbkb_sc_tests)) +rv32uzbkb_v_tests = $(addprefix rv32uzbkb-v-, $(rv32uzbkb_sc_tests)) +rv32uzbkb_ps_tests = $(addprefix rv32uzbkb-ps-, $(rv32uzbkb_sc_tests)) + +spike_tests += $(rv32uzbkb_p_tests) $(rv32uzbkb_v_tests) diff --git a/isa/rv32uzbkb/brev8.S b/isa/rv32uzbkb/brev8.S new file mode 100644 index 0000000..c231bd2 --- /dev/null +++ b/isa/rv32uzbkb/brev8.S @@ -0,0 +1,7 @@ +# See LICENSE for license details. + +#include "riscv_test.h" +#undef RVTEST_RV64U +#define RVTEST_RV64U RVTEST_RV32U + +#include "../rv64uzbkb/brev8.S" diff --git a/isa/rv32uzbkb/pack.S b/isa/rv32uzbkb/pack.S new file mode 100644 index 0000000..d1d4902 --- /dev/null +++ b/isa/rv32uzbkb/pack.S @@ -0,0 +1,68 @@ +# See LICENSE for license details. + +#***************************************************************************** +# pack.S +#----------------------------------------------------------------------------- +# +# Test pack instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV32U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_RR_OP( 2, pack, 0xDEF05678, 0x12345678, 0x9ABCDEF0 ); + TEST_RR_OP( 3, pack, 0x0000FFFF, 0x0000FFFF, 0xFFFF0000 ); + TEST_RR_OP( 4, pack, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF ); + TEST_RR_OP( 5, pack, 0x00000000, 0x00000000, 0x00000000 ); + TEST_RR_OP( 6, pack, 0x5555AAAA, 0xAAAAAAAA, 0x55555555 ); + + #------------------------------------------------------------- + # Source/Destination tests + #------------------------------------------------------------- + + TEST_RR_SRC1_EQ_DEST( 7, pack, 0xDEF05678, 0x12345678, 0x9ABCDEF0 ); + TEST_RR_SRC2_EQ_DEST( 8, pack, 0xDEF05678, 0x12345678, 0x9ABCDEF0 ); + TEST_RR_SRC12_EQ_DEST( 9, pack, 0xFFFFFFFF, 0xFFFFFFFF ); + + #------------------------------------------------------------- + # Bypassing tests + #------------------------------------------------------------- + + TEST_RR_DEST_BYPASS( 10, 0, pack, 0xDEF05678, 0x12345678, 0x9ABCDEF0 ); + TEST_RR_DEST_BYPASS( 11, 1, pack, 0x0000FFFF, 0x0000FFFF, 0xFFFF0000 ); + TEST_RR_DEST_BYPASS( 12, 2, pack, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF ); + + TEST_RR_SRC12_BYPASS( 13, 0, 0, pack, 0xDEF05678, 0x12345678, 0x9ABCDEF0 ); + TEST_RR_SRC12_BYPASS( 14, 0, 1, pack, 0xFFFFFFFF, 0x0000FFFF, 0x0000FFFF ); + TEST_RR_SRC12_BYPASS( 15, 0, 2, pack, 0xFFFFFFFF, 0x0000FFFF, 0x0000FFFF ); + TEST_RR_SRC12_BYPASS( 16, 1, 0, pack, 0xDEF05678, 0x12345678, 0x9ABCDEF0 ); + TEST_RR_SRC12_BYPASS( 17, 1, 1, pack, 0xFFFFFFFF, 0x0000FFFF, 0x0000FFFF ); + TEST_RR_SRC12_BYPASS( 18, 2, 0, pack, 0xFFFFFFFF, 0x0000FFFF, 0x0000FFFF ); + + TEST_RR_SRC21_BYPASS( 19, 0, 0, pack, 0xDEF05678, 0x12345678, 0x9ABCDEF0 ); + TEST_RR_SRC21_BYPASS( 20, 0, 1, pack, 0xFFFFFFFF, 0x0000FFFF, 0x0000FFFF ); + TEST_RR_SRC21_BYPASS( 21, 0, 2, pack, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF ); + TEST_RR_SRC21_BYPASS( 22, 1, 0, pack, 0xDEF05678, 0x12345678, 0x9ABCDEF0 ); + TEST_RR_SRC21_BYPASS( 23, 1, 1, pack, 0xFFFFFFFF, 0x0000FFFF, 0x0000FFFF ); + TEST_RR_SRC21_BYPASS( 24, 2, 0, pack, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF ); + + TEST_RR_ZEROSRC1( 25, pack, 0xDEF00000, 0x9ABCDEF0 ); + TEST_RR_ZEROSRC2( 26, pack, 0x00005678, 0x12345678 ); + TEST_RR_ZEROSRC12( 27, pack, 0x00000000 ); + TEST_RR_ZERODEST( 28, pack, 0x12345678, 0x9ABCDEF0 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + TEST_DATA +RVTEST_DATA_END diff --git a/isa/rv32uzbkb/packh.S b/isa/rv32uzbkb/packh.S new file mode 100644 index 0000000..bd5688e --- /dev/null +++ b/isa/rv32uzbkb/packh.S @@ -0,0 +1,68 @@ +# See LICENSE for license details. + +#***************************************************************************** +# packh.S +#----------------------------------------------------------------------------- +# +# Test packh instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV32U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_RR_OP( 2, packh, 0x0000F078, 0x12345678, 0x9ABCDEF0 ); + TEST_RR_OP( 3, packh, 0x0000FFFF, 0xFFFFFFFF, 0xFFFFFFFF ); + TEST_RR_OP( 4, packh, 0x00000000, 0x00000000, 0x00000000 ); + TEST_RR_OP( 5, packh, 0x0000CDAB, 0x000000AB, 0x000000CD ); + TEST_RR_OP( 6, packh, 0x00003412, 0x00000012, 0x00000034 ); + + #------------------------------------------------------------- + # Source/Destination tests + #------------------------------------------------------------- + + TEST_RR_SRC1_EQ_DEST( 12, packh, 0x0000F078, 0x12345678, 0x9ABCDEF0 ); + TEST_RR_SRC2_EQ_DEST( 13, packh, 0x0000F078, 0x12345678, 0x9ABCDEF0 ); + TEST_RR_SRC12_EQ_DEST( 14, packh, 0x0000FFFF, 0xFFFFFFFF ); + + #------------------------------------------------------------- + # Bypassing tests + #------------------------------------------------------------- + + TEST_RR_DEST_BYPASS( 15, 0, packh, 0x0000F078, 0x12345678, 0x9ABCDEF0 ); + TEST_RR_DEST_BYPASS( 16, 1, packh, 0x0000FFFF, 0xFFFFFFFF, 0xFFFFFFFF ); + TEST_RR_DEST_BYPASS( 17, 2, packh, 0x00000000, 0x00000000, 0x00000000 ); + + TEST_RR_SRC12_BYPASS( 18, 0, 0, packh, 0x0000F078, 0x12345678, 0x9ABCDEF0 ); + TEST_RR_SRC12_BYPASS( 19, 0, 1, packh, 0x0000FFFF, 0xFFFFFFFF, 0xFFFFFFFF ); + TEST_RR_SRC12_BYPASS( 20, 0, 2, packh, 0x00000000, 0x00000000, 0x00000000 ); + TEST_RR_SRC12_BYPASS( 21, 1, 0, packh, 0x0000F078, 0x12345678, 0x9ABCDEF0 ); + TEST_RR_SRC12_BYPASS( 22, 1, 1, packh, 0x0000FFFF, 0xFFFFFFFF, 0xFFFFFFFF ); + TEST_RR_SRC12_BYPASS( 23, 2, 0, packh, 0x00000000, 0x00000000, 0x00000000 ); + + TEST_RR_SRC21_BYPASS( 24, 0, 0, packh, 0x0000F078, 0x12345678, 0x9ABCDEF0 ); + TEST_RR_SRC21_BYPASS( 25, 0, 1, packh, 0x0000FFFF, 0xFFFFFFFF, 0xFFFFFFFF ); + TEST_RR_SRC21_BYPASS( 26, 0, 2, packh, 0x00000000, 0x00000000, 0x00000000 ); + TEST_RR_SRC21_BYPASS( 27, 1, 0, packh, 0x0000F078, 0x12345678, 0x9ABCDEF0 ); + TEST_RR_SRC21_BYPASS( 28, 1, 1, packh, 0x0000FFFF, 0xFFFFFFFF, 0xFFFFFFFF ); + TEST_RR_SRC21_BYPASS( 29, 2, 0, packh, 0x00000000, 0x00000000, 0x00000000 ); + + TEST_RR_ZEROSRC1( 30, packh, 0x0000F000, 0x9ABCDEF0 ); + TEST_RR_ZEROSRC2( 31, packh, 0x00000078, 0x12345678 ); + TEST_RR_ZEROSRC12( 32, packh, 0x00000000 ); + TEST_RR_ZERODEST( 33, packh, 0x12345678, 0x9ABCDEF0 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + TEST_DATA +RVTEST_DATA_END diff --git a/isa/rv32uzbkb/unzip.S b/isa/rv32uzbkb/unzip.S new file mode 100644 index 0000000..7c90be6 --- /dev/null +++ b/isa/rv32uzbkb/unzip.S @@ -0,0 +1,61 @@ +# See LICENSE for license details. + +#***************************************************************************** +# unzip.S +#----------------------------------------------------------------------------- +# +# Test unzip instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV32U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_R_OP( 2, unzip, 0x0000FFFF, 0x55555555 ); + TEST_R_OP( 3, unzip, 0xFFFF0000, 0xAAAAAAAA ); + TEST_R_OP( 4, unzip, 0x00000000, 0x00000000 ); + TEST_R_OP( 5, unzip, 0xFFFFFFFF, 0xFFFFFFFF ); + TEST_R_OP( 6, unzip, 0xAAAA5555, 0x99999999 ); + TEST_R_OP( 7, unzip, 0x0F0F0F0F, 0x00FF00FF ); + TEST_R_OP( 8, unzip, 0xBEFFE36B, 0xDEADBEEF ); + + #------------------------------------------------------------- + # Source/Destination tests + #------------------------------------------------------------- + + TEST_R_SRC1_EQ_DEST( 11, unzip, 0x0000FFFF, 0x55555555 ); + TEST_R_SRC1_EQ_DEST( 12, unzip, 0xFFFF0000, 0xAAAAAAAA ); + + #------------------------------------------------------------- + # Bypassing tests + #------------------------------------------------------------- + + TEST_R_DEST_BYPASS( 13, 0, unzip, 0x0000FFFF, 0x55555555 ); + TEST_R_DEST_BYPASS( 14, 1, unzip, 0x0000FFFF, 0x55555555 ); + TEST_R_DEST_BYPASS( 15, 2, unzip, 0x0000FFFF, 0x55555555 ); + TEST_R_DEST_BYPASS( 16, 3, unzip, 0x0000FFFF, 0x55555555 ); + + TEST_R_DEST_BYPASS( 17, 0, unzip, 0xFFFF0000, 0xAAAAAAAA ); + TEST_R_DEST_BYPASS( 18, 1, unzip, 0xFFFF0000, 0xAAAAAAAA ); + TEST_R_DEST_BYPASS( 19, 2, unzip, 0xFFFF0000, 0xAAAAAAAA ); + TEST_R_DEST_BYPASS( 20, 3, unzip, 0xFFFF0000, 0xAAAAAAAA ); + + TEST_R_DEST_BYPASS( 21, 0, unzip, 0xAAAA5555, 0x99999999 ); + TEST_R_DEST_BYPASS( 22, 1, unzip, 0xAAAA5555, 0x99999999 ); + TEST_R_DEST_BYPASS( 23, 2, unzip, 0xAAAA5555, 0x99999999 ); + TEST_R_DEST_BYPASS( 24, 3, unzip, 0xAAAA5555, 0x99999999 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + TEST_DATA +RVTEST_DATA_END
\ No newline at end of file diff --git a/isa/rv32uzbkb/zip.S b/isa/rv32uzbkb/zip.S new file mode 100644 index 0000000..98bfe84 --- /dev/null +++ b/isa/rv32uzbkb/zip.S @@ -0,0 +1,61 @@ +# See LICENSE for license details. + +#***************************************************************************** +# zip.S +#----------------------------------------------------------------------------- +# +# Test zip instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV32U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_R_OP( 2, zip, 0x55555555, 0x0000FFFF ); + TEST_R_OP( 3, zip, 0xAAAAAAAA, 0xFFFF0000 ); + TEST_R_OP( 4, zip, 0x00000000, 0x00000000 ); + TEST_R_OP( 5, zip, 0xFFFFFFFF, 0xFFFFFFFF ); + TEST_R_OP( 6, zip, 0x99999999, 0xAAAA5555 ); + TEST_R_OP( 7, zip, 0x00FF00FF, 0x0F0F0F0F ); + TEST_R_OP( 8, zip, 0xDEADBEEF, 0xBEFFE36B ); + + #------------------------------------------------------------- + # Source/Destination tests + #------------------------------------------------------------- + + TEST_R_SRC1_EQ_DEST( 11, zip, 0x55555555, 0x0000FFFF ); + TEST_R_SRC1_EQ_DEST( 12, zip, 0xAAAAAAAA, 0xFFFF0000 ); + + #------------------------------------------------------------- + # Bypassing tests + #------------------------------------------------------------- + + TEST_R_DEST_BYPASS( 13, 0, zip, 0x55555555, 0x0000FFFF ); + TEST_R_DEST_BYPASS( 14, 1, zip, 0x55555555, 0x0000FFFF ); + TEST_R_DEST_BYPASS( 15, 2, zip, 0x55555555, 0x0000FFFF ); + TEST_R_DEST_BYPASS( 16, 3, zip, 0x55555555, 0x0000FFFF ); + + TEST_R_DEST_BYPASS( 17, 0, zip, 0xAAAAAAAA, 0xFFFF0000 ); + TEST_R_DEST_BYPASS( 18, 1, zip, 0xAAAAAAAA, 0xFFFF0000 ); + TEST_R_DEST_BYPASS( 19, 2, zip, 0xAAAAAAAA, 0xFFFF0000 ); + TEST_R_DEST_BYPASS( 20, 3, zip, 0xAAAAAAAA, 0xFFFF0000 ); + + TEST_R_DEST_BYPASS( 21, 0, zip, 0x99999999, 0xAAAA5555 ); + TEST_R_DEST_BYPASS( 22, 1, zip, 0x99999999, 0xAAAA5555 ); + TEST_R_DEST_BYPASS( 23, 2, zip, 0x99999999, 0xAAAA5555 ); + TEST_R_DEST_BYPASS( 24, 3, zip, 0x99999999, 0xAAAA5555 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + TEST_DATA +RVTEST_DATA_END
\ No newline at end of file diff --git a/isa/rv32uzbkx/Makefrag b/isa/rv32uzbkx/Makefrag new file mode 100644 index 0000000..3458700 --- /dev/null +++ b/isa/rv32uzbkx/Makefrag @@ -0,0 +1,9 @@ +rv32uzbkx_sc_tests = \ + xperm8 \ + xperm4 + +rv32uzbkx_p_tests = $(addprefix rv32uzbkx-p-, $(rv32uzbkx_sc_tests)) +rv32uzbkx_v_tests = $(addprefix rv32uzbkx-v-, $(rv32uzbkx_sc_tests)) +rv32uzbkx_ps_tests = $(addprefix rv32uzbkx-ps-, $(rv32uzbkx_sc_tests)) + +spike_tests += $(rv32uzbkx_p_tests) $(rv32uzbkx_v_tests) diff --git a/isa/rv32uzbkx/xperm4.S b/isa/rv32uzbkx/xperm4.S new file mode 100644 index 0000000..8c2ec75 --- /dev/null +++ b/isa/rv32uzbkx/xperm4.S @@ -0,0 +1,74 @@ +# See LICENSE for license details. + +#***************************************************************************** +# xperm4.S +#----------------------------------------------------------------------------- +# +# Test xperm4 instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV32U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_RR_OP( 2, xperm4, 0x65432100, 0x01234567, 0x12345678 ); + TEST_RR_OP( 3, xperm4, 0xFFFFFFF0, 0xFFFFFFFF, 0x12345678 ); + TEST_RR_OP( 4, xperm4, 0x00000000, 0x00000000, 0x12345678 ); + TEST_RR_OP( 5, xperm4, 0x12345670, 0x76543210, 0x12345678 ); + TEST_RR_OP( 6, xperm4, 0x65432100, 0x01234567, 0x12345678 ); + + TEST_RR_OP( 7, xperm4, 0x0000000F, 0x89ABCDEF, 0x9ABCDEF0 ); + TEST_RR_OP( 8, xperm4, 0x0000000F, 0xFFFFFFFF, 0x9ABCDEF0 ); + TEST_RR_OP( 9, xperm4, 0x00000000, 0x00000000, 0x9ABCDEF0 ); + TEST_RR_OP( 10, xperm4, 0x00000000, 0x76543210, 0x9ABCDEF0 ); + TEST_RR_OP( 11, xperm4, 0x0000000F, 0x89ABCDEF, 0x9ABCDEF0 ); + + #------------------------------------------------------------- + # Source/Destination tests + #------------------------------------------------------------- + + TEST_RR_SRC1_EQ_DEST( 12, xperm4, 0x65432100, 0x01234567, 0x12345678 ); + TEST_RR_SRC2_EQ_DEST( 13, xperm4, 0x65432100, 0x01234567, 0x12345678 ); + TEST_RR_SRC12_EQ_DEST( 14, xperm4, 0x00000000, 0xFFFFFFFF ); + + #------------------------------------------------------------- + # Bypassing tests + #------------------------------------------------------------- + + TEST_RR_DEST_BYPASS( 15, 0, xperm4, 0x65432100, 0x01234567, 0x12345678 ); + TEST_RR_DEST_BYPASS( 16, 1, xperm4, 0xFFFFFFF0, 0xFFFFFFFF, 0x12345678 ); + TEST_RR_DEST_BYPASS( 17, 2, xperm4, 0x00000000, 0x00000000, 0x12345678 ); + + TEST_RR_SRC12_BYPASS( 18, 0, 0, xperm4, 0x65432100, 0x01234567, 0x12345678 ); + TEST_RR_SRC12_BYPASS( 19, 0, 1, xperm4, 0xFFFFFFF0, 0xFFFFFFFF, 0x12345678 ); + TEST_RR_SRC12_BYPASS( 20, 0, 2, xperm4, 0x00000000, 0x00000000, 0x12345678 ); + TEST_RR_SRC12_BYPASS( 21, 1, 0, xperm4, 0x65432100, 0x01234567, 0x12345678 ); + TEST_RR_SRC12_BYPASS( 22, 1, 1, xperm4, 0xFFFFFFF0, 0xFFFFFFFF, 0x12345678 ); + TEST_RR_SRC12_BYPASS( 23, 2, 0, xperm4, 0x00000000, 0x00000000, 0x12345678 ); + + TEST_RR_SRC21_BYPASS( 24, 0, 0, xperm4, 0x65432100, 0x01234567, 0x12345678 ); + TEST_RR_SRC21_BYPASS( 25, 0, 1, xperm4, 0xFFFFFFF0, 0xFFFFFFFF, 0x12345678 ); + TEST_RR_SRC21_BYPASS( 26, 0, 2, xperm4, 0x00000000, 0x00000000, 0x12345678 ); + TEST_RR_SRC21_BYPASS( 27, 1, 0, xperm4, 0x65432100, 0x01234567, 0x12345678 ); + TEST_RR_SRC21_BYPASS( 28, 1, 1, xperm4, 0xFFFFFFF0, 0xFFFFFFFF, 0x12345678 ); + TEST_RR_SRC21_BYPASS( 29, 2, 0, xperm4, 0x00000000, 0x00000000, 0x12345678 ); + + TEST_RR_ZEROSRC1( 30, xperm4, 0x00000000, 0x12345678 ); + TEST_RR_ZEROSRC2( 31, xperm4, 0x77777777, 0x01234567 ); + TEST_RR_ZEROSRC12( 32, xperm4, 0x00000000 ); + TEST_RR_ZERODEST( 33, xperm4, 0x01234567, 0x12345678 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + TEST_DATA +RVTEST_DATA_END diff --git a/isa/rv32uzbkx/xperm8.S b/isa/rv32uzbkx/xperm8.S new file mode 100644 index 0000000..8b6e973 --- /dev/null +++ b/isa/rv32uzbkx/xperm8.S @@ -0,0 +1,72 @@ +# See LICENSE for license details. + +#***************************************************************************** +# xperm8.S +#----------------------------------------------------------------------------- +# +# Test xperm8 instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV32U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_RR_OP( 2, xperm8, 0x02010000, 0x00010203, 0x01020304 ); + TEST_RR_OP( 3, xperm8, 0x88776655, 0x88776655, 0x03020100 ); + TEST_RR_OP( 4, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + TEST_RR_OP( 5, xperm8, 0xBABABABA, 0xCAFEBABE, 0x01010101 ); + + TEST_RR_OP( 6, xperm8, 0x34783478, 0x12345678, 0x02000200 ); + TEST_RR_OP( 7, xperm8, 0x00AA00DD, 0xAABBCCDD, 0x0403FF00 ); + TEST_RR_OP( 8, xperm8, 0x00FF00FF, 0xFFFFFFFF, 0x04030403 ); + TEST_RR_OP( 9, xperm8, 0x00000000, 0xFFFFFFFF, 0x07060504 ); + + #------------------------------------------------------------- + # Source/Destination tests + #------------------------------------------------------------- + + TEST_RR_SRC1_EQ_DEST( 10, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + TEST_RR_SRC2_EQ_DEST( 11, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + TEST_RR_SRC12_EQ_DEST( 12, xperm8, 0x03020100, 0x03020100 ); + + #------------------------------------------------------------- + # Bypassing tests + #------------------------------------------------------------- + + TEST_RR_DEST_BYPASS( 13, 0, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + TEST_RR_DEST_BYPASS( 14, 1, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + TEST_RR_DEST_BYPASS( 15, 2, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + + TEST_RR_SRC12_BYPASS( 16, 0, 0, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + TEST_RR_SRC12_BYPASS( 17, 0, 1, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + TEST_RR_SRC12_BYPASS( 18, 0, 2, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + TEST_RR_SRC12_BYPASS( 19, 1, 0, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + TEST_RR_SRC12_BYPASS( 20, 1, 1, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + TEST_RR_SRC12_BYPASS( 21, 2, 0, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + + TEST_RR_SRC21_BYPASS( 22, 0, 0, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + TEST_RR_SRC21_BYPASS( 23, 0, 1, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + TEST_RR_SRC21_BYPASS( 24, 0, 2, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + TEST_RR_SRC21_BYPASS( 25, 1, 0, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + TEST_RR_SRC21_BYPASS( 26, 1, 1, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + TEST_RR_SRC21_BYPASS( 27, 2, 0, xperm8, 0xEFBEADDE, 0xDEADBEEF, 0x00010203 ); + + TEST_RR_ZEROSRC1( 28, xperm8, 0x00000000, 0x12345678 ); + TEST_RR_ZEROSRC2( 29, xperm8, 0xBEBEBEBE, 0xCAFEBABE ); + TEST_RR_ZEROSRC12( 30, xperm8, 0x00000000 ); + TEST_RR_ZERODEST( 31, xperm8, 0xDEADBEEF, 0x00010203 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + TEST_DATA +RVTEST_DATA_END diff --git a/isa/rv64uzbkb/Makefrag b/isa/rv64uzbkb/Makefrag new file mode 100644 index 0000000..b116c70 --- /dev/null +++ b/isa/rv64uzbkb/Makefrag @@ -0,0 +1,11 @@ +rv64uzbkb_sc_tests = \ + brev8 \ + pack \ + packh \ + packw \ + +rv64uzbkb_p_tests = $(addprefix rv64uzbkb-p-, $(rv64uzbkb_sc_tests)) +rv64uzbkb_v_tests = $(addprefix rv64uzbkb-v-, $(rv64uzbkb_sc_tests)) +rv64uzbkb_ps_tests = $(addprefix rv64uzbkb-ps-, $(rv64uzbkb_sc_tests)) + +spike_tests += $(rv64uzbkb_p_tests) $(rv64uzbkb_v_tests) diff --git a/isa/rv64uzbkb/brev8.S b/isa/rv64uzbkb/brev8.S new file mode 100644 index 0000000..049644f --- /dev/null +++ b/isa/rv64uzbkb/brev8.S @@ -0,0 +1,56 @@ +# See LICENSE for license details. + +#***************************************************************************** +# brev8.S +#----------------------------------------------------------------------------- +# +# Test brev8 instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_R_OP( 2, brev8, 0x80C4A2E6, 0x01234567 ); + TEST_R_OP( 3, brev8, 0x00000000, 0x00000000 ); + TEST_R_OP( 4, brev8, 0xFFFFFFFF, 0xFFFFFFFF ); + TEST_R_OP( 5, brev8, 0x55555555, 0xAAAAAAAA ); + TEST_R_OP( 6, brev8, 0xAAAAAAAA, 0x55555555 ); + +#if __riscv_xlen == 64 + TEST_R_OP( 7, brev8, 0x80C4A2E680C4A2E6, 0x0123456701234567 ); + TEST_R_OP( 8, brev8, 0x0F0F0F0F0F0F0F0F, 0xF0F0F0F0F0F0F0F0 ); + TEST_R_OP( 9, brev8, 0xF0F0F0F0F0F0F0F0, 0x0F0F0F0F0F0F0F0F ); + TEST_R_OP( 10, brev8, 0x0000000000000000, 0x0000000000000000 ); + TEST_R_OP( 11, brev8, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF ); +#endif + + #------------------------------------------------------------- + # Source/Destination tests + #------------------------------------------------------------- + + TEST_R_SRC1_EQ_DEST( 12, brev8, 0x80C4A2E6, 0x01234567 ); + TEST_R_SRC1_EQ_DEST( 13, brev8, 0x55555555, 0xAAAAAAAA ); + + #------------------------------------------------------------- + # Bypassing tests + #------------------------------------------------------------- + + TEST_R_DEST_BYPASS( 14, 0, brev8, 0x80C4A2E6, 0x01234567 ); + TEST_R_DEST_BYPASS( 15, 1, brev8, 0x55555555, 0xAAAAAAAA ); + TEST_R_DEST_BYPASS( 16, 2, brev8, 0xAAAAAAAA, 0x55555555 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + TEST_DATA +RVTEST_DATA_END diff --git a/isa/rv64uzbkb/pack.S b/isa/rv64uzbkb/pack.S new file mode 100644 index 0000000..df4e76c --- /dev/null +++ b/isa/rv64uzbkb/pack.S @@ -0,0 +1,76 @@ +# See LICENSE for license details. + +#***************************************************************************** +# pack.S +#----------------------------------------------------------------------------- +# +# Test pack instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_RR_OP( 2, pack, 0x9ABCDEF012345678, 0x0000000012345678, 0x000000009ABCDEF0 ); + TEST_RR_OP( 3, pack, 0xFFFF00000000FFFF, 0x000000000000FFFF, 0x00000000FFFF0000 ); + TEST_RR_OP( 4, pack, 0xFFFFFFFFFFFFFFFF, 0x00000000FFFFFFFF, 0x00000000FFFFFFFF ); + TEST_RR_OP( 5, pack, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000 ); + TEST_RR_OP( 6, pack, 0x55555555AAAAAAAA, 0x00000000AAAAAAAA, 0x0000000055555555 ); + +#if __riscv_xlen == 64 + TEST_RR_OP( 7, pack, 0xDDEEFF0055667788, 0x1122334455667788, 0x99AABBCCDDEEFF00 ); + TEST_RR_OP( 8, pack, 0x00000000FFFFFFFF, 0x00000000FFFFFFFF, 0xFFFFFFFF00000000 ); + TEST_RR_OP( 9, pack, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF ); + TEST_RR_OP( 10, pack, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000 ); + TEST_RR_OP( 11, pack, 0x55555555AAAAAAAA, 0xAAAAAAAAAAAAAAAA, 0x5555555555555555 ); +#endif + + #------------------------------------------------------------- + # Source/Destination tests + #------------------------------------------------------------- + + TEST_RR_SRC1_EQ_DEST( 12, pack, 0x9ABCDEF012345678, 0x0000000012345678, 0x000000009ABCDEF0 ); + TEST_RR_SRC2_EQ_DEST( 13, pack, 0x9ABCDEF012345678, 0x0000000012345678, 0x000000009ABCDEF0 ); + TEST_RR_SRC12_EQ_DEST( 14, pack, 0xFFFFFFFFFFFFFFFF, 0x00000000FFFFFFFF ); + + #------------------------------------------------------------- + # Bypassing tests + #------------------------------------------------------------- + + TEST_RR_DEST_BYPASS( 15, 0, pack, 0x9ABCDEF012345678, 0x0000000012345678, 0x000000009ABCDEF0 ); + TEST_RR_DEST_BYPASS( 16, 1, pack, 0xFFFF00000000FFFF, 0x000000000000FFFF, 0x00000000FFFF0000 ); + TEST_RR_DEST_BYPASS( 17, 2, pack, 0xFFFFFFFFFFFFFFFF, 0x00000000FFFFFFFF, 0x00000000FFFFFFFF ); + + TEST_RR_SRC12_BYPASS( 18, 0, 0, pack, 0x9ABCDEF012345678, 0x0000000012345678, 0x000000009ABCDEF0 ); + TEST_RR_SRC12_BYPASS( 19, 0, 1, pack, 0xFFFF00000000FFFF, 0x000000000000FFFF, 0x00000000FFFF0000 ); + TEST_RR_SRC12_BYPASS( 20, 0, 2, pack, 0xFFFFFFFFFFFFFFFF, 0x00000000FFFFFFFF, 0x00000000FFFFFFFF ); + TEST_RR_SRC12_BYPASS( 21, 1, 0, pack, 0x9ABCDEF012345678, 0x0000000012345678, 0x000000009ABCDEF0 ); + TEST_RR_SRC12_BYPASS( 22, 1, 1, pack, 0xFFFF00000000FFFF, 0x000000000000FFFF, 0x00000000FFFF0000 ); + TEST_RR_SRC12_BYPASS( 23, 2, 0, pack, 0xFFFFFFFFFFFFFFFF, 0x00000000FFFFFFFF, 0x00000000FFFFFFFF ); + + TEST_RR_SRC21_BYPASS( 24, 0, 0, pack, 0x9ABCDEF012345678, 0x0000000012345678, 0x000000009ABCDEF0 ); + TEST_RR_SRC21_BYPASS( 25, 0, 1, pack, 0xFFFF00000000FFFF, 0x000000000000FFFF, 0x00000000FFFF0000 ); + TEST_RR_SRC21_BYPASS( 26, 0, 2, pack, 0xFFFFFFFFFFFFFFFF, 0x00000000FFFFFFFF, 0x00000000FFFFFFFF ); + TEST_RR_SRC21_BYPASS( 27, 1, 0, pack, 0x9ABCDEF012345678, 0x0000000012345678, 0x000000009ABCDEF0 ); + TEST_RR_SRC21_BYPASS( 28, 1, 1, pack, 0xFFFF00000000FFFF, 0x000000000000FFFF, 0x00000000FFFF0000 ); + TEST_RR_SRC21_BYPASS( 29, 2, 0, pack, 0xFFFFFFFFFFFFFFFF, 0x00000000FFFFFFFF, 0x00000000FFFFFFFF ); + + TEST_RR_ZEROSRC1( 30, pack, 0x9ABCDEF000000000, 0x000000009ABCDEF0 ); + TEST_RR_ZEROSRC2( 31, pack, 0x0000000012345678, 0x0000000012345678 ); + TEST_RR_ZEROSRC12( 32, pack, 0x0000000000000000 ); + TEST_RR_ZERODEST( 33, pack, 0x0000000012345678, 0x000000009ABCDEF0 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + TEST_DATA +RVTEST_DATA_END diff --git a/isa/rv64uzbkb/packh.S b/isa/rv64uzbkb/packh.S new file mode 100644 index 0000000..267257f --- /dev/null +++ b/isa/rv64uzbkb/packh.S @@ -0,0 +1,68 @@ +# See LICENSE for license details. + +#***************************************************************************** +# packh.S +#----------------------------------------------------------------------------- +# +# Test packh instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_RR_OP( 2, packh, 0x0000000000000F88, 0x1122334455667788, 0x99AABBCCDDEEFF0F ); + TEST_RR_OP( 3, packh, 0x000000000000FFFF, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF ); + TEST_RR_OP( 4, packh, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000 ); + TEST_RR_OP( 5, packh, 0x000000000000CDAB, 0x00000000000000AB, 0x00000000000000CD ); + TEST_RR_OP( 6, packh, 0x0000000000003412, 0x0000000000000012, 0x0000000000000034 ); + + #------------------------------------------------------------- + # Source/Destination tests + #------------------------------------------------------------- + + TEST_RR_SRC1_EQ_DEST( 7, packh, 0x000000000000F078, 0x0000000012345678, 0x000000009ABCDEF0 ); + TEST_RR_SRC2_EQ_DEST( 8, packh, 0x000000000000F078, 0x0000000012345678, 0x000000009ABCDEF0 ); + TEST_RR_SRC12_EQ_DEST( 9, packh, 0x000000000000FFFF, 0x00000000FFFFFFFF ); + + #------------------------------------------------------------- + # Bypassing tests + #------------------------------------------------------------- + + TEST_RR_DEST_BYPASS( 10, 0, packh, 0x000000000000F078, 0x0000000012345678, 0x000000009ABCDEF0 ); + TEST_RR_DEST_BYPASS( 11, 1, packh, 0x000000000000FFFF, 0x00000000FFFFFFFF, 0x00000000FFFFFFFF ); + TEST_RR_DEST_BYPASS( 12, 2, packh, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000 ); + + TEST_RR_SRC12_BYPASS( 13, 0, 0, packh, 0x000000000000F078, 0x0000000012345678, 0x000000009ABCDEF0 ); + TEST_RR_SRC12_BYPASS( 14, 0, 1, packh, 0x000000000000FFFF, 0x00000000FFFFFFFF, 0x00000000FFFFFFFF ); + TEST_RR_SRC12_BYPASS( 15, 0, 2, packh, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000 ); + TEST_RR_SRC12_BYPASS( 16, 1, 0, packh, 0x000000000000F078, 0x0000000012345678, 0x000000009ABCDEF0 ); + TEST_RR_SRC12_BYPASS( 17, 1, 1, packh, 0x000000000000FFFF, 0x00000000FFFFFFFF, 0x00000000FFFFFFFF ); + TEST_RR_SRC12_BYPASS( 18, 2, 0, packh, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000 ); + + TEST_RR_SRC21_BYPASS( 19, 0, 0, packh, 0x000000000000F078, 0x0000000012345678, 0x000000009ABCDEF0 ); + TEST_RR_SRC21_BYPASS( 20, 0, 1, packh, 0x000000000000FFFF, 0x00000000FFFFFFFF, 0x00000000FFFFFFFF ); + TEST_RR_SRC21_BYPASS( 21, 0, 2, packh, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000 ); + TEST_RR_SRC21_BYPASS( 22, 1, 0, packh, 0x000000000000F078, 0x0000000012345678, 0x000000009ABCDEF0 ); + TEST_RR_SRC21_BYPASS( 23, 1, 1, packh, 0x000000000000FFFF, 0x00000000FFFFFFFF, 0x00000000FFFFFFFF ); + TEST_RR_SRC21_BYPASS( 24, 2, 0, packh, 0x0000000000000000, 0x0000000000000000, 0x0000000000000000 ); + + TEST_RR_ZEROSRC1( 25, packh, 0x000000000000F000, 0x000000009ABCDEF0 ); + TEST_RR_ZEROSRC2( 26, packh, 0x0000000000000078, 0x0000000012345678 ); + TEST_RR_ZEROSRC12( 27, packh, 0x0000000000000000 ); + TEST_RR_ZERODEST( 28, packh, 0x0000000012345678, 0x000000009ABCDEF0 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + TEST_DATA +RVTEST_DATA_END diff --git a/isa/rv64uzbkb/packw.S b/isa/rv64uzbkb/packw.S new file mode 100644 index 0000000..a4f5cb3 --- /dev/null +++ b/isa/rv64uzbkb/packw.S @@ -0,0 +1,68 @@ +# See LICENSE for license details. + +#***************************************************************************** +# packw.S +#----------------------------------------------------------------------------- +# +# Test packw instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_RR_OP( 2, packw, 0x0000000056781234, 0x0000000012341234, 0x0000000056785678 ); + TEST_RR_OP( 3, packw, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF ); + TEST_RR_OP( 4, packw, 0x0000000000007FFF, 0x0000000000007FFF, 0x0000000000000000 ); + TEST_RR_OP( 5, packw, 0xFFFFFFFF80000000, 0x0000000000000000, 0x0000000000008000 ); + TEST_RR_OP( 6, packw, 0x000000007FFF8000, 0x0000000000008000, 0x0000000000007FFF ); + + #------------------------------------------------------------- + # Source/Destination tests + #------------------------------------------------------------- + + TEST_RR_SRC1_EQ_DEST( 7, packw, 0x0000000056781234, 0x0000000012341234, 0x0000000056785678 ); + TEST_RR_SRC2_EQ_DEST( 8, packw, 0x0000000056781234, 0x0000000012341234, 0x0000000056785678 ); + TEST_RR_SRC12_EQ_DEST( 9, packw, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF ); + + #------------------------------------------------------------- + # Bypassing tests + #------------------------------------------------------------- + + TEST_RR_DEST_BYPASS( 10, 0, packw, 0x0000000056781234, 0x0000000012341234, 0x0000000056785678 ); + TEST_RR_DEST_BYPASS( 11, 1, packw, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF ); + TEST_RR_DEST_BYPASS( 12, 2, packw, 0x0000000000007FFF, 0x0000000000007FFF, 0x0000000000000000 ); + + TEST_RR_SRC12_BYPASS( 13, 0, 0, packw, 0x0000000056781234, 0x0000000012341234, 0x0000000056785678 ); + TEST_RR_SRC12_BYPASS( 14, 0, 1, packw, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF ); + TEST_RR_SRC12_BYPASS( 15, 0, 2, packw, 0x0000000000007FFF, 0x0000000000007FFF, 0x0000000000000000 ); + TEST_RR_SRC12_BYPASS( 16, 1, 0, packw, 0x0000000056781234, 0x0000000012341234, 0x0000000056785678 ); + TEST_RR_SRC12_BYPASS( 17, 1, 1, packw, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF ); + TEST_RR_SRC12_BYPASS( 18, 2, 0, packw, 0x0000000000007FFF, 0x0000000000007FFF, 0x0000000000000000 ); + + TEST_RR_SRC21_BYPASS( 19, 0, 0, packw, 0x0000000056781234, 0x0000000012341234, 0x0000000056785678 ); + TEST_RR_SRC21_BYPASS( 20, 0, 1, packw, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF ); + TEST_RR_SRC21_BYPASS( 21, 0, 2, packw, 0x0000000000007FFF, 0x0000000000007FFF, 0x0000000000000000 ); + TEST_RR_SRC21_BYPASS( 22, 1, 0, packw, 0x0000000056781234, 0x0000000012341234, 0x0000000056785678 ); + TEST_RR_SRC21_BYPASS( 23, 1, 1, packw, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF ); + TEST_RR_SRC21_BYPASS( 24, 2, 0, packw, 0x0000000000007FFF, 0x0000000000007FFF, 0x0000000000000000 ); + + TEST_RR_ZEROSRC1( 25, packw, 0x0000000056780000, 0x0000000056785678 ); + TEST_RR_ZEROSRC2( 26, packw, 0x0000000000001234, 0x0000000012341234 ); + TEST_RR_ZEROSRC12( 27, packw, 0x0000000000000000 ); + TEST_RR_ZERODEST( 28, packw, 0x0000000012341234, 0x0000000056785678 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + TEST_DATA +RVTEST_DATA_END diff --git a/isa/rv64uzbkx/Makefrag b/isa/rv64uzbkx/Makefrag new file mode 100644 index 0000000..d700933 --- /dev/null +++ b/isa/rv64uzbkx/Makefrag @@ -0,0 +1,9 @@ +rv64uzbkx_sc_tests = \ + xperm8 \ + xperm4 + +rv64uzbkx_p_tests = $(addprefix rv64uzbkx-p-, $(rv64uzbkx_sc_tests)) +rv64uzbkx_v_tests = $(addprefix rv64uzbkx-v-, $(rv64uzbkx_sc_tests)) +rv64uzbkx_ps_tests = $(addprefix rv64uzbkx-ps-, $(rv64uzbkx_sc_tests)) + +spike_tests += $(rv64uzbkx_p_tests) $(rv64uzbkx_v_tests) diff --git a/isa/rv64uzbkx/xperm4.S b/isa/rv64uzbkx/xperm4.S new file mode 100644 index 0000000..6759e87 --- /dev/null +++ b/isa/rv64uzbkx/xperm4.S @@ -0,0 +1,72 @@ +# See LICENSE for license details. + +#***************************************************************************** +# xperm4.S +#----------------------------------------------------------------------------- +# +# Test xperm4 instruction. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_RR_OP( 2, xperm4, 0x7777777765432100, 0x0000000001234567, 0x0000000012345678 ); + TEST_RR_OP( 3, xperm4, 0xFFFFFFFFFFFFFFF0, 0x00000000FFFFFFFF, 0x0000000012345678 ); + TEST_RR_OP( 4, xperm4, 0x0000000000000000, 0x0000000000000000, 0x0000000012345678 ); + TEST_RR_OP( 5, xperm4, 0x0000000012345670, 0x0000000076543210, 0x0000000012345678 ); + + TEST_RR_OP( 6, xperm4, 0xEDCBA9876543210F, 0x0123456789ABCDEF, 0x123456789ABCDEF0 ); + TEST_RR_OP( 7, xperm4, 0xFFFFFFFFFFFFFFFF, 0xFFFFFFFFFFFFFFFF, 0x123456789ABCDEF0 ); + TEST_RR_OP( 8, xperm4, 0x0000000000000000, 0x0000000000000000, 0x123456789ABCDEF0 ); + TEST_RR_OP( 9, xperm4, 0x123456789ABCDEF0, 0xFEDCBA9876543210, 0x123456789ABCDEF0 ); + + #------------------------------------------------------------- + # Source/Destination tests + #------------------------------------------------------------- + + TEST_RR_SRC1_EQ_DEST( 10, xperm4, 0x7777777765432100, 0x0000000001234567, 0x0000000012345678 ); + TEST_RR_SRC2_EQ_DEST( 11, xperm4, 0x7777777765432100, 0x0000000001234567, 0x0000000012345678 ); + TEST_RR_SRC12_EQ_DEST( 12, xperm4, 0xFFFFFFFF00000000, 0x00000000FFFFFFFF ); + + #------------------------------------------------------------- + # Bypassing tests + #------------------------------------------------------------- + + TEST_RR_DEST_BYPASS( 13, 0, xperm4, 0x7777777765432100, 0x0000000001234567, 0x0000000012345678 ); + TEST_RR_DEST_BYPASS( 14, 1, xperm4, 0xFFFFFFFFFFFFFFF0, 0x00000000FFFFFFFF, 0x0000000012345678 ); + TEST_RR_DEST_BYPASS( 15, 2, xperm4, 0x0000000000000000, 0x0000000000000000, 0x0000000012345678 ); + + TEST_RR_SRC12_BYPASS( 16, 0, 0, xperm4, 0x7777777765432100, 0x0000000001234567, 0x0000000012345678 ); + TEST_RR_SRC12_BYPASS( 17, 0, 1, xperm4, 0xFFFFFFFFFFFFFFF0, 0x00000000FFFFFFFF, 0x0000000012345678 ); + TEST_RR_SRC12_BYPASS( 18, 0, 2, xperm4, 0x0000000000000000, 0x0000000000000000, 0x0000000012345678 ); + TEST_RR_SRC12_BYPASS( 19, 1, 0, xperm4, 0x7777777765432100, 0x0000000001234567, 0x0000000012345678 ); + TEST_RR_SRC12_BYPASS( 20, 1, 1, xperm4, 0xFFFFFFFFFFFFFFF0, 0x00000000FFFFFFFF, 0x0000000012345678 ); + TEST_RR_SRC12_BYPASS( 21, 2, 0, xperm4, 0x0000000000000000, 0x0000000000000000, 0x0000000012345678 ); + + TEST_RR_SRC21_BYPASS( 22, 0, 0, xperm4, 0x7777777765432100, 0x0000000001234567, 0x0000000012345678 ); + TEST_RR_SRC21_BYPASS( 23, 0, 1, xperm4, 0xFFFFFFFFFFFFFFF0, 0x00000000FFFFFFFF, 0x0000000012345678 ); + TEST_RR_SRC21_BYPASS( 24, 0, 2, xperm4, 0x0000000000000000, 0x0000000000000000, 0x0000000012345678 ); + TEST_RR_SRC21_BYPASS( 25, 1, 0, xperm4, 0x7777777765432100, 0x0000000001234567, 0x0000000012345678 ); + TEST_RR_SRC21_BYPASS( 26, 1, 1, xperm4, 0xFFFFFFFFFFFFFFF0, 0x00000000FFFFFFFF, 0x0000000012345678 ); + TEST_RR_SRC21_BYPASS( 27, 2, 0, xperm4, 0x0000000000000000, 0x0000000000000000, 0x0000000012345678 ); + + TEST_RR_ZEROSRC1( 28, xperm4, 0x0000000000000000, 0x0000000012345678 ); + TEST_RR_ZEROSRC2( 29, xperm4, 0x7777777777777777, 0x0000000001234567 ); + TEST_RR_ZEROSRC12( 30, xperm4, 0x0000000000000000 ); + TEST_RR_ZERODEST( 31, xperm4, 0x0000000001234567, 0x0000000012345678 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + TEST_DATA +RVTEST_DATA_END diff --git a/isa/rv64uzbkx/xperm8.S b/isa/rv64uzbkx/xperm8.S new file mode 100644 index 0000000..79200ae --- /dev/null +++ b/isa/rv64uzbkx/xperm8.S @@ -0,0 +1,71 @@ +# See LICENSE for license details. + +#***************************************************************************** +# xperm8.S +#----------------------------------------------------------------------------- +# +# Test xperm8 instruction for RV64. +# + +#include "riscv_test.h" +#include "test_macros.h" + +RVTEST_RV64U +RVTEST_CODE_BEGIN + + #------------------------------------------------------------- + # Arithmetic tests + #------------------------------------------------------------- + + TEST_RR_OP( 2, xperm8, 0x0706050403020100, 0x0706050403020100, 0x0706050403020100 ); + TEST_RR_OP( 3, xperm8, 0x8877665544332211, 0x8877665544332211, 0x0706050403020100 ); + TEST_RR_OP( 4, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + TEST_RR_OP( 5, xperm8, 0x6767676767676767, 0xCAFEBABE01234567, 0x0000000000000000 ); + TEST_RR_OP( 6, xperm8, 0x2244668822446688, 0x1122334455667788, 0x0604020006040200 ); + TEST_RR_OP( 7, xperm8, 0x00AA00BB00CC00DD, 0xAABBCCDDEEFF0011, 0x0F070E060D050C04 ); + TEST_RR_OP( 8, xperm8, 0x00FF00FF00FF00FF, 0xFFFFFFFFFFFFFFFF, 0x0807080708070807 ); + TEST_RR_OP( 9, xperm8, 0x0000000000000000, 0xFFFFFFFFFFFFFFFF, 0x0F0E0D0C0B0A0908 ); + + #------------------------------------------------------------- + # Source/Destination tests + #------------------------------------------------------------- + + TEST_RR_SRC1_EQ_DEST( 10, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + TEST_RR_SRC2_EQ_DEST( 11, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + TEST_RR_SRC12_EQ_DEST( 12, xperm8, 0x0706050403020100, 0x0706050403020100 ); + + #------------------------------------------------------------- + # Bypassing tests + #------------------------------------------------------------- + + TEST_RR_DEST_BYPASS( 13, 0, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + TEST_RR_DEST_BYPASS( 14, 1, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + TEST_RR_DEST_BYPASS( 15, 2, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + + TEST_RR_SRC12_BYPASS( 16, 0, 0, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + TEST_RR_SRC12_BYPASS( 17, 0, 1, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + TEST_RR_SRC12_BYPASS( 18, 0, 2, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + TEST_RR_SRC12_BYPASS( 19, 1, 0, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + TEST_RR_SRC12_BYPASS( 20, 1, 1, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + TEST_RR_SRC12_BYPASS( 21, 2, 0, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + + TEST_RR_SRC21_BYPASS( 22, 0, 0, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + TEST_RR_SRC21_BYPASS( 23, 0, 1, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + TEST_RR_SRC21_BYPASS( 24, 0, 2, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + TEST_RR_SRC21_BYPASS( 25, 1, 0, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + TEST_RR_SRC21_BYPASS( 26, 1, 1, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + TEST_RR_SRC21_BYPASS( 27, 2, 0, xperm8, 0xBEBAFECAEFBEADDE, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + + TEST_RR_ZEROSRC1( 28, xperm8, 0x0000000000000000, 0x1234567812345678 ); + TEST_RR_ZEROSRC2( 29, xperm8, 0xBEBEBEBEBEBEBEBE, 0xCAFEBABECAFEBABE ); + TEST_RR_ZEROSRC12( 30, xperm8, 0x0000000000000000 ); + TEST_RR_ZERODEST( 31, xperm8, 0xDEADBEEFCAFEBABE, 0x0001020304050607 ); + + TEST_PASSFAIL + +RVTEST_CODE_END + + .data +RVTEST_DATA_BEGIN + TEST_DATA +RVTEST_DATA_END
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