aboutsummaryrefslogtreecommitdiff
path: root/tcl/target/u8500.cfg
blob: faaf97d17ceaf66603b3b35cd5ad04d873493486 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
#  Copyright (C) ST-Ericsson SA 2011
#  Author : michel.jaouen@stericsson.com
#  U8500 target 

proc mmu_off {} {
	set cp [arm mrc 15 0 1 0 0]
	set cp [expr ($cp & ~1)]
	arm mcr 15 0 1 0 0 $cp
}

proc mmu_on {} {
	set cp [arm mrc 15 0 1 0 0]
	set cp [expr ($cp | 1)]
	arm mcr 15 0 1 0 0 $cp
}

proc ocd_gdb_restart {target_id} {
    global _TARGETNAME_1
	global _SMP
    targets $_TARGETNAME_1
	if { [expr ($_SMP == 1)] } {
	cortex_a smp off
	}
	rst_run
	halt
	if { [expr ($_SMP == 1)]} {
	cortex_a smp on
	}
}

proc smp_reg {} {
	global _TARGETNAME_1
    global _TARGETNAME_2
    targets $_TARGETNAME_1 
	echo "$_TARGETNAME_1"
	set pc1 [reg pc]
	set stck1 [reg sp_svc]
	targets $_TARGETNAME_2
	echo "$_TARGETNAME_1"
	set pc2 [reg pc]
	set stck2 [reg sp_svc]
}


proc u8500_tapenable {chip val} {
	echo "JTAG tap enable $chip"
}


proc pwrsts { } {
	global _CHIPNAME
	irscan $_CHIPNAME.jrc 0x3a
	drscan $_CHIPNAME.jrc 4 0
	set pwrsts [drscan $_CHIPNAME.jrc 16 0]
    echo "pwrsts ="$pwrsts
    set a9 [expr (0x$pwrsts & 0xc)]
	set ape [expr (0x$pwrsts & 0x3)]
	if {[string equal "0" $ape]} {
		echo "ape off"
	} else {
		echo "ape on"
	}
	echo "$a9"
	switch $a9 {
		4 {
			echo "A9 in retention"
		  }
		8 {
			echo "A9 100% DVFS"
		  }
		c { 
			echo "A9 50% DVFS"
		}
	}
}

proc poll_pwrsts { } {
	global _CHIPNAME
	set result 1
	set i 0
	irscan $_CHIPNAME.jrc 0x3a
	drscan $_CHIPNAME.jrc 4 0
	set pwrsts [drscan $_CHIPNAME.jrc 16 0]
	set pwrsts [expr (0x$pwrsts & 0xc)]
	while {[string equal "4" $pwrsts] && $i<20} {
		irscan $_CHIPNAME.jrc 0x3a
		drscan $_CHIPNAME.jrc 4 0;
		set pwrsts [drscan $_CHIPNAME.jrc 16 0]
		set pwrsts [expr (0x$pwrsts & 0xc)]
		if {![string equal "4" $pwrsts]} {
			set result 1
		} else {
			set result 0
			sleep 200
			echo "loop $i"
		}
		incr i
	}
	return $result
}

proc halt_ { } {
	if {[poll_pwrsts]==1} {
		halt
	} else {
		echo "halt failed : target in retention"
	}
}


proc u8500_dapenable {chip} {
}

proc u8500_tapdisable {chip val} {
	echo "JTAG tap disable $chip"
}


proc enable_apetap {} {
	global _CHIPNAME
	global _TARGETNAME_2
    global _TARGETNAME_1
	poll off
	irscan $_CHIPNAME.jrc 0x3e
	drscan $_CHIPNAME.jrc 8 0xcf
	jtag tapenable $_CHIPNAME.dap
	irscan $_CHIPNAME.jrc 0x6
	drscan $_CHIPNAME.jrc 32 0
	irscan $_CHIPNAME.jrc 0x6
	drscan $_CHIPNAME.jrc 32 0
	set status [$_TARGETNAME_1 curstate]
    if {[string equal "unknown" $status]} {
	$_TARGETNAME_1 arp_examine
	cache_config l2x 0xa0412000 8
	}

	set status [$_TARGETNAME_2 curstate]
    if {[string equal "unknown" $status]} {
	$_TARGETNAME_2 arp_examine
	}
	}

tcl_port 5555
telnet_port 4444
gdb_port 3333

if { [info exists CHIPNAME] } {	
global _CHIPNAME
    set _CHIPNAME $CHIPNAME
} else {
global _CHIPNAME
	set _CHIPNAME u8500
}

if { [info exists ENDIAN] } {
	set _ENDIAN $ENDIAN
} else {
 # this defaults to a bigendian
	set _ENDIAN little
}



# Subsidiary TAP: APE with scan chains for ARM Debug, EmbeddedICE-RT,
if { [info exists CPUTAPID] } {
   set _CPUTAPID $CPUTAPID
} else {
	set _CPUTAPID 0x4ba00477
}
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0xe -irmask 0xf -expected-id $_CPUTAPID -disable
jtag configure $_CHIPNAME.cpu -event tap-enable \
	"u8500_dapenable $_CHIPNAME.cpu"
jtag configure $_CHIPNAME.cpu -event tap-disable \
	"u8500_tapdisable $_CHIPNAME.cpu 0xc0"


#CLTAPC TAP JRC equivalent
if { [info exists CLTAPC_ID] } {
   set _CLTAPC_ID $CLTAPC_ID
} else {
   set _CLTAPC_ID 0x22286041
}
jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x6 -irmask 0xf -expected-id $_CLTAPC_ID -ignore-version


if { ![info exists TARGETNAME_1] } {
global _TARGETNAME_1
set _TARGETNAME_1 $_CHIPNAME.cpu1
} else {
global _TARGETNAME_1
set _TARGETNAME_1 $TARGETNAME_1
}

if { [info exists DAP_DBG1] } {
	set _DAP_DBG1 $DAP_DBG1
} else {
	set _DAP_DBG1 0x801A8000 
}
if { [info exists DAP_DBG2] } {
	set _DAP_DBG2 $DAP_DBG2
} else {
	set _DAP_DBG2 0x801AA000 
}

dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu

target create $_TARGETNAME_1 cortex_a -dap $_CHIPNAME.dap -dbgbase $_DAP_DBG1 -coreid 0 -rtos linux


if { ![info exists TARGETNAME_2] } {
global _TARGETNAME_2
set _TARGETNAME_2 $_CHIPNAME.cpu2
} else {
global _TARGETNAME_2
set _TARGETNAME_2 $TARGETNAME_2
}

target create $_TARGETNAME_2 cortex_a -dap $_CHIPNAME.dap -dbgbase $_DAP_DBG2 -coreid 1 -rtos linux


if {![info exists SMP]} {
global _SMP
set _SMP 1
} else {
global _SMP
set _SMP $SMP
}
global SMP
if { $_SMP == 1} { 
target smp $_CHIPNAME.cpu2 $_CHIPNAME.cpu1
}




proc secsts1 { } {
	global _CHIPNAME
        irscan $_CHIPNAME.jrc 0x3a
		drscan $_CHIPNAME.jrc 4 4
	set secsts1 [drscan $_CHIPNAME.jrc 16 0]
	echo "secsts1 ="$secsts1
	set secsts1 [expr (0x$secsts1 & 0x4)]
	if {![string equal "4" $secsts1]} {
	echo "APE target secured"
        } else {
        echo "APE target not secured"
        }
}

proc att { } {
	global _CHIPNAME
	jtag arp_init
	irscan $_CHIPNAME.jrc 0x3a
	drscan $_CHIPNAME.jrc 4 4
	set secsts1 [drscan $_CHIPNAME.jrc 16 0]
	echo "secsts1 ="$secsts1
	set secsts1 [expr (0x$secsts1 & 0x4)]
	if {[string equal "4" $secsts1]} {
		if {[poll_pwrsts]==1} {
		enable_apetap
                } else {
		echo "target in retention"
		}
	} else {
		echo "target secured"
	}
	
}



proc rst_run { } {
	global _CHIPNAME
	global _TARGETNAME_2
	global _TARGETNAME_1
	set status [$_TARGETNAME_1 curstate]
	if {[string equal "halted" $status]} {
	resume
	targets $_TARGETNAME_1
	}
    set status [$_TARGETNAME_2 curstate]
	if {[string equal "halted" $status]} {
	resume
	targets $_TARGETNAME_2
	}
   	poll off
	jtag arp_init
	reset
	sleep 20
	irscan $_CHIPNAME.jrc 0x3a
	drscan $_CHIPNAME.jrc 4 4
	set secsts1 [drscan $_CHIPNAME.jrc 16 0]
	echo "secsts1 ="$secsts1
	set secsts1 [expr (0x$secsts1 & 0x4)]
	while {![string equal "4" $secsts1]} {
		irscan u8500.jrc 0x3a
		drscan u8500.jrc 4 4
		set secsts1 [drscan $_CHIPNAME.jrc 16 0]
		echo "secsts1 ="$secsts1
		set secsts1 [expr (0x$secsts1 & 0x4)]
	}
	echo "ape debugable"
	enable_apetap
	poll on
	targets $_TARGETNAME_1
	dap apsel 1
}

if {![info exists MAXSPEED]} {
global _MAXSPEED
set _MAXSPEED 15000
} else {
global _MAXSPEED 
set _MAXSPEED $MAXSPEED
}
global _MAXSPEED 
adapter speed $_MAXSPEED


gdb_breakpoint_override hard
set mem inaccessible-by-default-off

jtag_ntrst_delay 100
reset_config trst_and_srst combined