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# SPDX-License-Identifier: GPL-2.0-or-later
# script for Nuvoton MuMicro Cortex-M0 Series
# Adapt based on what transport is active.
source [find target/swj-dp.tcl]
# Set Chipname
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME NuMicro
}
# SWD DP-ID Nuvoton NuMicro Cortex-M0 has SWD Transport only.
if { [info exists CPUDAPID] } {
set _CPUDAPID $CPUDAPID
} else {
set _CPUDAPID 0x0BB11477
}
# Work-area is a space in RAM used for flash programming
# By default use 2kB
if { [info exists WORKAREASIZE] } {
set _WORKAREASIZE $WORKAREASIZE
} else {
set _WORKAREASIZE 0x800
}
# Debug Adapter Target Settings
swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUDAPID
dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
# flash bank <name> numicro <base> <size(autodetect,set to 0)> 0 0 <target#>
#set _FLASHNAME $_CHIPNAME.flash
#flash bank $_FLASHNAME numicro 0 $_FLASHSIZE 0 0 $_TARGETNAME
# flash size will be probed
set _FLASHNAME $_CHIPNAME.flash_aprom
flash bank $_FLASHNAME numicro 0x00000000 0 0 0 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash_data
flash bank $_FLASHNAME numicro 0x0001F000 0 0 0 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash_ldrom
flash bank $_FLASHNAME numicro 0x00100000 0 0 0 $_TARGETNAME
set _FLASHNAME $_CHIPNAME.flash_config
flash bank $_FLASHNAME numicro 0x00300000 0 0 0 $_TARGETNAME
# set default SWCLK frequency
adapter speed 1000
# set default srst setting "none"
reset_config none
# HLA doesn't have cortex_m commands
if {![using_hla]} {
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m reset_config sysresetreq
}
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