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#
# This is for the "at91rm9200-DK" (not the EK) eval board.
#
# The two are probably very simular.... I have DK...
#
# It has atmel at91rm9200 chip.
source [find target/at91rm9200.cfg]
$_TARGETNAME configure -event gdb-attach { reset init }
$_TARGETNAME configure -event reset-init { at91rm9200_dk_init }
#flash bank <driver> <base> <size> <chip_width> <bus_width>
flash_bank cfi 0x10000000 0x00200000 2 2 0
proc at91rm9200_dk_init { } {
# Try to run at 1khz... Yea, that slow!
# Chip is really running @ 32khz
jtag_khz 8
mww 0xfffffc64 0xffffffff
## disable all clocks but system clock
mww 0xfffffc04 0xfffffffe
## disable all clocks to pioa and piob
mww 0xfffffc14 0xffffffc3
## master clock = slow cpu = slow
## (means the CPU is running at 32khz!)
mww 0xfffffc30 0
## main osc enable
mww 0xfffffc20 0x0000ff01
## program pllA
mww 0xfffffc28 0x20263e04
## program pllB
mww 0xfffffc2c 0x10483e0e
## let pll settle... sleep 100msec
sleep 100
## switch to fast clock
mww 0xfffffc30 0x202
## Sleep some - (go read)
sleep 100
#========================================
# CPU now runs at 180mhz
# SYS runs at 60mhz.
jtag_khz 40000
#========================================
## set memc for all memories
mww 0xffffff60 0x02
## program smc controller
mww 0xffffff70 0x3284
## init sdram
mww 0xffffff98 0x7fffffd0
## all banks precharge
mww 0xffffff80 0x02
## touch sdram chip to make it work
mww 0x20000000 0
## sdram controller mode register
mww 0xffffff90 0x04
mww 0x20000000 0
mww 0x20000000 0
mww 0x20000000 0
mww 0x20000000 0
mww 0x20000000 0
mww 0x20000000 0
mww 0x20000000 0
mww 0x20000000 0
## sdram controller mode register
## Refresh, etc....
mww 0xffffff90 0x03
mww 0x20000080 0
mww 0xffffff94 0x1f4
mww 0x20000080 0
mww 0xffffff90 0x10
mww 0x20000000 0
mww 0xffffff00 0x01
}
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