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git-svn-id: svn://svn.berlios.de/openocd/trunk@2689 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2683 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2672 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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lots of side effects.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2669 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2665 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2664 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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"PB44"
git-svn-id: svn://svn.berlios.de/openocd/trunk@2662 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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regression from 2600 to 2604
git-svn-id: svn://svn.berlios.de/openocd/trunk@2614 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2610 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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right spots. Should have been done in previous commit.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2604 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- remove endianness options; these chips hard-wire "little"
- $_TARGETNAME updates:
* don't pass $_TARGETNAME where a TAP label is required
* flash config uses $_TARGETNAME (it might not be target #0)
* simplify one $_TARGETNAME construction
- update work area setup:
* remove VM spec; these chips have no VM!
* fix some wrong sizes (0x4000 == 16K, not 4K)
* simplify: take defaults
- comment fixups
git-svn-id: svn://svn.berlios.de/openocd/trunk@2589 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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and board file
git-svn-id: svn://svn.berlios.de/openocd/trunk@2584 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2583 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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chip and EK-LM3S1968 board
git-svn-id: svn://svn.berlios.de/openocd/trunk@2582 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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Add flash programming support for NXP LPC1700 cortex_m3 based family
git-svn-id: svn://svn.berlios.de/openocd/trunk@2579 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2556 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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from the target CPU support .
git-svn-id: svn://svn.berlios.de/openocd/trunk@2504 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2493 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2492 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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enable" is the default
on ARM9 cores, and update the DaVinci config files so they
no longer explicitly specify it.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2484 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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Analog Device Eval-ADuC7060 eval board.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2459 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2455 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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Prepare the DaVinci PLL code to support the version 0x0E module
used in newer chips (e.g. dm365): rename the original code so
it's specific to version 0x02 PLL modules, and update the dm355evm
code to use that new name.
Fix two minor bugs in that version 2 code: sysclk3 setup used
the sysclk2 divider address (affecting video processing on dm355,
no worry for now) and sysclk2 setup had a syntax error.
Also minor fixups to dm355evm, mostly to permit use of RTCK.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2447 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2440 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2433 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2432 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2431 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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This patch adds support for the Luminary Micro LM3S9B90 target and
LM3S9B92 Evaluation Kit. These kits include a new ft2232 adapter, the
Luminary In-Circuit Debug Interface (ICDI) Board, so this is added as a
new ft2232 layout called "luminary_icdi".
git-svn-id: svn://svn.berlios.de/openocd/trunk@2429 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2419 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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Minor bugfix ... previous version was tested *with* ICEpick active.
The "-disable" can swap with "-enable"; but not with an empty string.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2418 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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Improve the PXA255 target config: move all that board-specific
setup to the pxa255_sst board.cfg, to which it evidently belongs
(it's the only PXA255 board now included).
Provide the PXA255 JTAG id from Intel docs, and add a comment
about how this chip is now EOL'd (last orders taken).
Note that I still can't get my old PXA255 board to work. There's
something broken in the reset sequence, which is preventing the
TAP from coming up at all. Old mailing list posts suggest this
is a longstanding bug...
git-svn-id: svn://svn.berlios.de/openocd/trunk@2416 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2383 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2353 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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chip. Think of this as
an improved DM355, integrating much better HD video support,
Ethernet, and other goodies.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2351 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2349 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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and - what is most important - correct (it's working [; ). I've also added some comments which try to clarify the meaning of all that's in there.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2269 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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Update the Beagle setup:
- OMAP3530 updates:
* split ICEpick TAP enable support to its own file, for
reuse and eventually for storing other utility code
like emulation reset
* clean up, including labeling the tap as for DAP not
for the Cortex-A8 and making endianness non-variable
* add a few FIXMEs
- BeagleBoard cleanup: there's no SRST, "endstate" is gone, etc
I'm not sure I'd say it's further than "barely limping" just yet.
Key issues remain lack of Cortex-A8 support, and more complete
support for resetting.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2267 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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DM6446 config updates:
- List two more TAPs, as disabled, mostly for doc purposes
- Included basic ICEpick support, still disabled by default
- Shorten line lengths
- Use $_TARGETNAME to configure the ETM and ETB
- This ARM core don't support endianness overriding
For now, boards that can't jumper EMU0/EMU1 will need to tweak
a variable's setting.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2265 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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Add another board ... OMAP2420 "H4" board. This won't be very widely
used with OpenOCD, but with mainline support in both U-Boot and Linux
it at least makes for a more complete set (and another testcase).
This is incomplete support in several respects. The ARM11 support is
not very deep yet; most registers aren't available, and the ETM can't
be hooked up. Plus, there's no script for OMAP-specific stuff like
setting up the SDRAM controller. Eventually the same NAND controller
driver should work with OMAP2 and OMAP3.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2242 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2135 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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Add configuration for an old AT91rm9200 board, the Cogent CSB 337.
Worth noting from the OpenOCD perspective:
- It got a real hardware trace port connector; wired up here as
much as we can, lacking inexpensive trace-aware dongles.
- This is the first in-tree use of the "arm920t cp15" command.
It adjusts the CPU clocking and enables i-cache, which gives
more than 4x speedup after booting Linux; it's visible even
just running U-Boot.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2134 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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git-svn-id: svn://svn.berlios.de/openocd/trunk@2075 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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Split out OSK5912 board support from the omap5912 target config, and make
it pass sanity checks on my (Rev C/original) hardware:
- Fix syntax error ("-irlen" not "irlen")
- Provide real TAP ids for the ARM926ejs and the C55x dsp
- Label both CPUs appropriately (DSP, ARM)
- List both flash chips
The scan chain looks like this (note truncated DSP instruction code):
TapName | Enabled | IdCode Expected IrLen IrCap IrMask Instr
---|--------------------|---------|------------|------------|------|------|------|---------
0 | omap5912.dsp | Y | 0x03df1d81 | 0x03df1d81 | 0x26 | 0x00 | 0x00 | 0xffffffff
1 | omap5912.arm | Y | 0x0692602f | 0x0692602f | 0x04 | 0x01 | 0x00 | 0x0c
2 | omap5912.unknown | Y | 0x00000000 | 0x00000000 | 0x08 | 0x00 | 0x00 | 0xff
I still don't know what that third TAP is; maybe an early version of
an ICEpick JTAG router.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1974 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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- Move src/tcl to tcl/.
- Update top Makefile.am to use new path name.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1919 b42882b7-edfa-0310-969c-e2dbd0fdcd60
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