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AgeCommit message (Expand)AuthorFilesLines
2019-05-14target: use LOG_USER to print errors in eventsAntonio Borneo1-1/+6
2019-05-14target: change prototype of target_process_reset()Antonio Borneo1-5/+5
2019-05-14target/arm946e: rewrite jim_arm946e_cp15 to arm945e_handle_cp15Tomas Vanek1-38/+22
2019-05-14target: rewrite jim_target_event_list to handle_target_event_listTomas Vanek1-12/+11
2019-04-24armv7a: Improve parsing of MPIDR register to avoid error message for Cortex R5Tommy Vestermark2-13/+16
2019-04-24target/cortex_a: use extensively cortex_a_wait_dscr_bits()Antonio Borneo1-71/+39
2019-04-24target/cortex_a: check dscr before timeoutAntonio Borneo1-3/+11
2019-04-24target/cortex_a: fix waiting for target halted after stepAntonio Borneo1-0/+2
2019-04-10target/cortex_m: Implement maskisr steponly optionChristopher Head2-25/+121
2019-04-10fix for sanitizer errors in left shiftsMete Balci1-1/+1
2019-04-10target/riscv: Free registers to avoid memory leakMarc Schink1-14/+17
2019-04-10target: fix copy&paste error in cget -coreidTomas Vanek1-1/+1
2019-04-07Set empty usage field for commands that do not need parametersAntonio Borneo2-0/+2
2019-04-07target/adi_v5_swd: add "usage" field to command "swd"Antonio Borneo1-0/+1
2019-04-07command_registration: add empty usage field to chained commandsAntonio Borneo6-2/+6
2019-04-07target/armv7a: simplify help description of command "l2x"Antonio Borneo1-2/+1
2019-04-07target/riscv: use coherent syntax in struct initializationAntonio Borneo1-4/+4
2019-04-07target/openrisc: use coherent syntax in struct initializationAntonio Borneo1-5/+5
2019-04-07target/armv4_5: use coherent syntax in struct initializationAntonio Borneo1-4/+4
2019-04-07target/arm7_9_common: use coherent syntax in struct initializationAntonio Borneo1-3/+3
2019-04-03target/arm_adi_v5: fix typoMete Balci1-1/+1
2019-04-03armv7a_mmu: Remove warning on va = paFlorian Fainelli1-2/+0
2019-04-03target/cortex_m: remove target halted check when removing a breakpointTomas Vanek1-9/+3
2019-04-01target/cortex_m: remove fp_code_available countingTomas Vanek2-18/+1
2019-04-01target/cortex_m: simplify cortex_m_unset_breakpoint()Tomas Vanek1-10/+4
2019-03-27smp: move sub-command "smp_gdb" in file smp.cAntonio Borneo3-56/+28
2019-03-27smp: replace commands smp_on/smp_off with "smp [on|off]"Antonio Borneo5-154/+96
2019-03-27Lots of RISC-V improvements.Tim Newsome7-379/+1764
2019-03-23mips32: pracc: Fix indentMarek Vasut1-3/+3
2019-03-23mips32: pracc: Fix UPPER/LOWER macrosMarek Vasut1-2/+2
2019-03-14target/mips: Use 'bool' data typeMarc Schink2-15/+15
2019-03-14target/xscale: Use 'bool' data typeMarc Schink1-15/+15
2019-03-14target/dsp563xx: Use 'bool' data typeMarc Schink1-23/+23
2019-03-14target/adi_v5_swd: improve error check while updating DP_SELECTAntonio Borneo1-13/+42
2019-03-14target/adi_v5_swd: update cached value on write to DP_SELECTAntonio Borneo1-1/+4
2019-03-12target/breakpoints: make internal functions staticTomas Vanek1-4/+6
2019-03-08gdb_server, target: Add target_address_bits()Tim Newsome4-1/+39
2019-03-06target/openrisc/x86_32_common: Use 'bool' data typeMarc Schink1-12/+12
2019-03-06target/openrisc/or1k: Use 'bool' data typeMarc Schink1-8/+8
2019-03-06target/lakemont: Use 'bool' data typeMarc Schink1-12/+12
2019-03-06target/feroceon: Use 'bool' data typeMarc Schink1-6/+6
2019-03-06target/etb: Use 'bool' data typeMarc Schink1-4/+4
2019-03-06target/arm_semihosting: Use 'bool' data typeMarc Schink1-6/+6
2019-03-06target/embeddedice: Use 'bool' data typeMarc Schink1-4/+4
2019-03-06target/cortex_a: Use 'bool' data typeMarc Schink1-6/+6
2019-03-06target/avr32_ap7k: Use 'bool' data typeMarc Schink1-8/+8
2019-03-06target/arm926ejs: Use 'bool' data typeMarc Schink1-3/+3
2019-03-06target/arm920t: Use 'bool' data typeMarc Schink1-7/+7
2019-03-06target/arm720t: Use 'bool' data typeMarc Schink1-3/+3
2019-03-06target/aarch64: Use 'bool' data typeMarc Schink1-2/+2
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