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AgeCommit message (Expand)AuthorFilesLines
2009-10-12simplify XScale debug handler installationDavid Brownell4-42/+58
2009-10-12more xscale cleanup (mostly removing JTAG hooks)David Brownell2-88/+65
2009-10-12Merge commit 'origin/master'Øyvind Harboe3-256/+257
2009-10-12If halt times out, stop GDB. Allows e.g. manual reset via monitor commands.Øyvind Harboe2-2/+39
2009-10-11xscale_load_ic cleanupDavid Brownell1-16/+16
2009-10-11xscale.c cleanupDavid Brownell1-186/+197
2009-10-11xscale bugfix to handler loadingDavid Brownell1-2/+2
2009-10-11xscale minor cleanupDavid Brownell1-43/+31
2009-10-10printf format warning fixesDavid Brownell2-12/+14
2009-10-09ARM11 error checkingØyvind Harboe3-52/+119
2009-10-08prevent abort via polling during jtag_resetDavid Brownell1-9/+8
2009-10-08Stop GDB when polling fails, srst assert or powerdropout is detectedØyvind Harboe2-4/+24
2009-10-07buildfixdbrownell1-0/+1
2009-10-07Updates for "reset_config":dbrownell1-4/+11
2009-10-07add timeouts and fix syntax error handling of mrc/mcr commands.oharboe1-1/+2
2009-10-07add timeouts and fix syntax error handling of mrc/mcr commands.oharboe1-18/+59
2009-10-06Dragonite has the same EICE affliction as feroceon.dbrownell1-1/+2
2009-10-05Minor cleanup to ARM926 debug entry:dbrownell1-2/+6
2009-10-02It is not possible to invalidate I-Cache on memory writes while the target is...mlu1-0/+3
2009-10-02Make sure that DSCR_DTR_RX is not full before writingmlu1-0/+27
2009-10-02More error reporting in Cortex_a8 execute_opcodemlu1-0/+6
2009-10-02Added asser_reset and deassert_reset for cortex_a8mlu1-2/+2
2009-10-02Added asser_reset and deassert_reset for cortex_a8mlu1-22/+56
2009-10-02Minor ETB and ETM bugfixes and doc updatesdbrownell2-54/+82
2009-10-01ARMv7A: Report fault status registers when in Abort statemlu1-0/+23
2009-09-30Add DSCR_DTR_RX_FULL bit definemlu1-0/+1
2009-09-29ARM11 command handling fixesdbrownell1-41/+41
2009-09-29ETM: fix build issue on MinGW.dbrownell1-20/+21
2009-09-29ETB: cleanup needless symbol exports and forward decls.dbrownell2-40/+35
2009-09-28Shrink symbols exported from arm9tdmi.c and remove a forward ref.dbrownell1-35/+38
2009-09-23When setting up an ETM, cache its ETM_CONFIG register. Thendbrownell2-51/+178
2009-09-23Start cleaning up ETM register handling. On one ARM926 ETM+ETBdbrownell2-167/+176
2009-09-23Initial ETM cleanups. Most of these are cosmetic:dbrownell2-83/+113
2009-09-21Remove annoying end-of-line whitespace from most src/*dbrownell11-63/+63
2009-09-20Debug message updates:dbrownell1-12/+1
2009-09-19Added CPUDBG_WCR_BASE definemlu1-0/+1
2009-09-19Avoid cache invalidation when writing to hardware debug registersmlu1-4/+19
2009-09-19Minor behavior fixes for the two JTAG reset events (C/internal,dbrownell1-1/+2
2009-09-18Move Cortex A8 debug access initialisation from omap3530.cfg to cortex_a8.cmlu1-28/+39
2009-09-17srst_gates_jtag option. at91sam9260 needs retesting, and possibly srst_gates_...oharboe1-1/+12
2009-09-17The "arm9tdmi.c" file is more of a generic ARM9 support file:dbrownell1-3/+17
2009-09-16Remove unused varables (moved to armv7a)mlu1-5/+0
2009-09-16Use a variable armv7a->debug_base instead of hardedcoded OMAP3530_DEBUG_BASEmlu1-28/+31
2009-09-15Define debug_base, debug_ap, memory_ap in armv7a_common_tmlu1-0/+7
2009-09-15Updated mode string list.mlu1-2/+2
2009-09-15Definy symbolic values for VA to PA address translation operationsmlu1-0/+10
2009-09-14Check return values to avoid infinite wait in loop on error.mlu1-4/+8
2009-09-14Cache invalidation when writing to memorymlu1-0/+18
2009-09-13More CortexA8 debug register definitions.mlu1-0/+4
2009-09-13Fix argument passing in cortex_a8_write_cp.mlu1-2/+1