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riscv-tools/riscv-openocd.git
FE_402_fix
__archive__
add_macos_build
autoconf
bscan_optimization
bscan_tunnel
buf_sget
build32
busy
compliance_dev
debug-log-reg-failure
deinit
dmi_read
dmstatus_version
dsp5680_build
eclipse_memory_read
eclipse_multicore_fix
examine_command
examine_unavailable_harts
examine_unavailable_harts_backup
examine_unavailable_harts_rebase
examine_unavailable_harts_squash
fence_i_fix_for_release
fix-halt-reason-after-singlestep
fix_macbuild
gd32vf103
gdb_next_port
gitignore-build
global
halt_examine
haltreq
hypervisor_translate
jlink
log_output
macbuild
macro
manual_hwbp
master
mem64
mpsse_flush
multicore
new_bscan_approach
newprogram
nohartstatus
old_fixes_and_eclipse_memory_read
old_triggers
print_port
race
rbb_cleanup
regcache
regression_test_janmat_experim
release
remove-slot_t-from-riscv-013
reset_test
reverse-resume-order
riscv
riscv-batch-cleanup
riscv-compliance
riscv-compliance-dev
s2_increment
sba_tests
set_group
static
travis-nop
update_defines
us_xds110
vector2
winbuild
wip
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Author
Files
Lines
2009-09-20
Debug message updates:
dbrownell
1
-12
/
+1
2009-09-19
Added CPUDBG_WCR_BASE define
mlu
1
-0
/
+1
2009-09-19
Avoid cache invalidation when writing to hardware debug registers
mlu
1
-4
/
+19
2009-09-19
Minor behavior fixes for the two JTAG reset events (C/internal,
dbrownell
1
-1
/
+2
2009-09-18
Move Cortex A8 debug access initialisation from omap3530.cfg to cortex_a8.c
mlu
1
-28
/
+39
2009-09-17
srst_gates_jtag option. at91sam9260 needs retesting, and possibly srst_gates_...
oharboe
1
-1
/
+12
2009-09-17
The "arm9tdmi.c" file is more of a generic ARM9 support file:
dbrownell
1
-3
/
+17
2009-09-16
Remove unused varables (moved to armv7a)
mlu
1
-5
/
+0
2009-09-16
Use a variable armv7a->debug_base instead of hardedcoded OMAP3530_DEBUG_BASE
mlu
1
-28
/
+31
2009-09-15
Define debug_base, debug_ap, memory_ap in armv7a_common_t
mlu
1
-0
/
+7
2009-09-15
Updated mode string list.
mlu
1
-2
/
+2
2009-09-15
Definy symbolic values for VA to PA address translation operations
mlu
1
-0
/
+10
2009-09-14
Check return values to avoid infinite wait in loop on error.
mlu
1
-4
/
+8
2009-09-14
Cache invalidation when writing to memory
mlu
1
-0
/
+18
2009-09-13
More CortexA8 debug register definitions.
mlu
1
-0
/
+4
2009-09-13
Fix argument passing in cortex_a8_write_cp.
mlu
1
-2
/
+1
2009-09-12
David Brownell <david-b@pacbell.net>
oharboe
3
-26
/
+40
2009-09-11
Nicolas Pitre <nico@cam.org> put feroceon target definition at the end so to ...
oharboe
1
-86
/
+79
2009-09-11
Nicolas Pitre <nico@cam.org> Dragonite support
oharboe
4
-20
/
+76
2009-09-11
spelling mistake
oharboe
1
-2
/
+2
2009-09-11
do not use dynamically sized stack arrays, not compatible with embedded OS's
oharboe
1
-10
/
+24
2009-09-11
registering a target event twice caused infinite loop. Same bug as in jtag/co...
oharboe
1
-4
/
+9
2009-09-11
Nicolas Pitre <nico@cam.org> tighten error checking in bulk_write
oharboe
1
-4
/
+15
2009-09-10
Alexei Babich <a.babich@rez.ru> fix problems with unecessary tailend byte acc...
oharboe
1
-0
/
+12
2009-09-09
David Brownell <david-b@pacbell.net>
oharboe
4
-4
/
+20
2009-09-08
Report correct core instruction state for ARMv/A targets
mlu
1
-1
/
+1
2009-09-08
Load PC with bit 0 set to 1 when resuming to say in Thumb instruction state.
mlu
1
-2
/
+7
2009-09-08
David Brownell <david-b@pacbell.net>
oharboe
1
-0
/
+86
2009-09-08
David Brownell <david-b@pacbell.net>
oharboe
1
-35
/
+137
2009-09-07
Improved handling of instruction set state, helps for debugging Thumb state.
mlu
1
-7
/
+5
2009-09-04
Mahr, Stefan <Stefan.Mahr@sphairon.com> removes the endianness swapping in mi...
oharboe
1
-44
/
+0
2009-09-04
Matt Hsu <matt@0xlab.org> This patch simply enables the halting debug mode.
oharboe
1
-0
/
+7
2009-09-04
more debug output for breakpoints
oharboe
1
-2
/
+10
2009-09-04
Matt Hsu <matt@0xlab.org> Tidy up the bit-offset operation for DSCR register
oharboe
2
-6
/
+15
2009-09-01
- fix a regression when using cortex_m3 emulated dcc channel
ntfreak
1
-10
/
+19
2009-08-31
Warning fix
duane
1
-0
/
+3
2009-08-30
David Brownell <david-b@pacbell.net> start phasing out integers as target IDs
oharboe
2
-35
/
+22
2009-08-28
David Brownell <david-b@pacbell.net> fix warnings
oharboe
1
-4
/
+8
2009-08-28
added arm11 timeout error messages
oharboe
3
-11
/
+94
2009-08-28
restore ICE watchpoint registers when the *last* software breakpoint is removed
oharboe
2
-3
/
+23
2009-08-28
David Brownell <david-b@pacbell.net> ARM disassembly support for about five d...
oharboe
1
-6
/
+345
2009-08-27
arm11 hardware step using simulation + breakpoint. Use "hardware_step enable"...
oharboe
1
-19
/
+28
2009-08-27
arm11 single stepping wip - at least we know the next PC now
oharboe
1
-0
/
+4
2009-08-27
arm11 single stepping wip
oharboe
1
-0
/
+101
2009-08-27
refactor arm simulator to allow arm11 code to use it as well - no observable ...
oharboe
2
-49
/
+147
2009-08-26
Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ...
oharboe
1
-5
/
+23
2009-08-26
Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ...
oharboe
1
-1
/
+1
2009-08-26
Matt Hsu <matt@0xlab.org> and Holger Hans Peter Freyther <zecke@selfish.org> ...
oharboe
1
-1
/
+1
2009-08-26
Matt Hsu <matt@0xlab.org> cortex-a8: Copy some more registers from the docume...
oharboe
1
-0
/
+8
2009-08-26
Matt Hsu <matt@0xlab.org> cortex_a8_exec_opcode is writing the ARM instructio...
oharboe
1
-1
/
+9
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