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2018-05-25Merge pull request #261 from riscv/trigger_enumv20180629Tim Newsome3-5/+19
2018-05-22Merge pull request #257 from riscv/commentTim Newsome2-0/+8
2018-05-22Delay trigger enumeration until it's required.Tim Newsome3-5/+19
2018-05-22Fix posible null deref in get_target_typeDan Robertson1-3/+10
2018-05-17Review feedback.Tim Newsome1-1/+1
2018-05-17Comment riscv_set_register, register_write_directTim Newsome2-0/+8
2018-05-17Merge pull request #251 from riscv/from_upstreamTim Newsome23-149/+285
2018-05-16riscv: remove unexpected check during resetMegan Wachs1-8/+0
2018-05-08blank_check_memory prototype has changed.Tim Newsome1-17/+0
2018-05-08arm_dpm: flush both scratch registers (R0 and R1)Philipp Tomsich1-5/+7
2018-05-08target/cortex_m: allow setting the type of a breakpointTomas Vanek2-29/+1
2018-05-08armv8: valgrind memleak fixesMatthias Welwarsky5-7/+70
2018-05-08target armv7m: multi-block erase checkTomas Vanek1-39/+95
2018-05-08target, flash: prepare infrastructure for multi-block blank checkTomas Vanek10-33/+53
2018-05-08target: free target SMP list on shutdownMatthias Welwarsky1-0/+12
2018-05-08target/arm_adi_v5: extend apcsw command to accept arbitrary bitsTomas Vanek3-18/+33
2018-05-08arm_adi_v5: Add ability to ignore the CSYSPWRUPACK bitMatthias Welwarsky4-9/+22
2018-05-07Don't error if hart select isn't implemented.Tim Newsome1-1/+1
2018-05-03Conform to OpenOCD styleTim Newsome1-2/+1
2018-05-03Merge branch 'riscv' into optimizeTim Newsome41-944/+2911
2018-05-03counter*h registers only exist on RV32Tim Newsome1-0/+66
2018-05-01Merge pull request #246 from darius-bluespec/sysbus-bugfixTim Newsome1-1/+3
2018-05-01Properly retry system bus access if busy error was detected.Darius Rad1-0/+2
2018-05-01Fix polling for system bus busy.Darius Rad1-1/+1
2018-04-30Merge branch 'riscv' into notice_resetTim Newsome40-816/+2861
2018-04-20Fix mingw32 build.Tim Newsome1-4/+4
2018-04-20Fix error messages for reset dmi timeouts.Tim Newsome1-52/+52
2018-04-20Make encoding.h pass style guide.Tim Newsome1-0/+2
2018-04-20Fix comments in encoding.h.Tim Newsome1-11/+11
2018-04-18Use reset timeout to read dmstatus out of resetTim Newsome1-11/+28
2018-04-18Enforce OpenOCD style guide. (#239)Tim Newsome3-16/+10
2018-04-09Only write hartsel if we're changing it.Tim Newsome1-2/+12
2018-04-09Merge branch 'master' into from_upstreamTim Newsome35-734/+2577
2018-04-06Cache registers while halted.Tim Newsome1-15/+57
2018-04-05Just read abstractcs once when executing a commandTim Newsome1-9/+4
2018-04-04target/cortex_m: avoid dwt comparator overflowCody P Schafer1-0/+13
2018-04-03Track misa per-hart even in -rtos modeTim Newsome4-28/+36
2018-04-02Add gdb_report_register_access_error commandTim Newsome2-9/+0
2018-03-30Add wall clock timeout to dmi_op()Tim Newsome1-5/+18
2018-03-30Merge pull request #231 from riscv/authTim Newsome1-2/+2
2018-03-30Merge pull request #230 from riscv/delegTim Newsome1-0/+8
2018-03-30Fix auth error message.Tim Newsome1-2/+2
2018-03-30jtag/core, target: unregister JTAG eventsTomas Vanek1-0/+2
2018-03-30target: fix display halt message logicTomas Vanek2-2/+5
2018-03-30target: restructure dap supportMatthias Welwarsky16-277/+713
2018-03-30arm_cti: add cti command groupMatthias Welwarsky5-38/+512
2018-03-27Once more... Less sloppy this time.Tim Newsome1-1/+1
2018-03-27Don't rely on havereset when deasserting reset.Tim Newsome3-49/+11
2018-03-27aarch64: add cpsr bitfields to target descriptionMatthias Welwarsky1-4/+45
2018-03-27tdesc: bitfields may carry a typeMatthias Welwarsky1-0/+3
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