riscv-tools/riscv-openocd.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2023-07-29	target: fix messages and return values of failed op because not halted	Tomas Vanek	1	-1/+1
2023-07-22	target/riscv: Add null pointer check before right shift for bscan tunneling.	eolson	1	-2/+4
2023-06-16	riscv/semihosting: Fix ebreak skip on fileio mode	Marek Vrbka	1	-5/+5
2023-05-27	target: use unsigned int for timeout_ms	Antonio Borneo	1	-2/+2
2023-05-25	target/riscv-013: clear sticky error when DMI operation fails	Amaury Pouly	1	-0/+2
2023-04-30	src: fix clang15 compiler warnings	Erhan Kurubas	1	-2/+0
2023-01-15	riscv: drop deprecated command 'riscv test_sba_config_reg'	Antonio Borneo	3	-409/+0
2023-01-15	riscv: drop deprecated command 'riscv set_prefer_sba'	Antonio Borneo	1	-39/+0
2022-10-21	doc: fix riscv commands	Antonio Borneo	1	-0/+3
2022-09-23	target/riscv: fix use of uninitialized value	Antonio Borneo	1	-10/+8
2022-09-23	target/riscv: fix undefined operation	Antonio Borneo	1	-0/+1
2022-09-23	target/riscv: fix dead assignment	Antonio Borneo	1	-4/+1
2022-09-23	target/riscv: fix unused initialization	Antonio Borneo	1	-1/+0
2022-09-23	target/riscv-013: fix unused initialization	Antonio Borneo	1	-3/+1
2022-09-23	target/riscv-013: fix unchecked return code	Antonio Borneo	1	-1/+3
2022-09-18	openocd: fix SPDX tag format for files .c	Antonio Borneo	6	-6/+6
2022-09-13	riscv: don't export local symbols	Antonio Borneo	2	-42/+22
2022-09-13	riscv: make local symbols static	Antonio Borneo	3	-33/+33
2022-08-27	target/riscv: Update with latest encoding from riscv-opcodes	Tim Newsome	1	-3374/+3661
2022-08-15	target/riscv: Update debug_defines.h.	Tim Newsome	1	-936/+1444
2022-08-01	target/riscv: add common magic	Tomas Vanek	2	-0/+12
2022-08-01	target/riscv: use struct riscv_info instead of typedef riscv_info_t	Tomas Vanek	4	-27/+35
2022-07-23	target/semihosting: export semihosting_common_handlers[] from header file	Erhan Kurubas	1	-1/+0
2022-07-23	openocd: src: remove duplicated GPL license tag	Antonio Borneo	1	-13/+0
2022-07-23	openocd: build: add SPDX tag	Antonio Borneo	1	-0/+2
2022-07-02	semihosting: move semihosting_result_t from riscv.h to the semihosting_common.h	Erhan Kurubas	3	-29/+24
2022-06-04	target/riscv: drop unused variable registers_initialized	Tomas Vanek	2	-8/+0
2022-05-18	target/riscv: fix 'reset run' after 'reset halt'	Tomas Vanek	1	-5/+5
2022-03-19	target: Rework 'set' variable of break-/watchpoints	Marc Schink	1	-7/+7
2022-02-14	Fix small memory leak.	Tim Newsome	1	-3/+5
2022-02-14	target/riscv: revive 'riscv resume_order'	Tim Newsome	1	-3/+6
2022-02-14	target/smp: use a struct list_head to hold the smp targets	Antonio Borneo	1	-11/+12
2022-02-05	semihosting: User defined operation, Tcl command exec on host	Zoltán Dudás	1	-1/+3
2021-12-24	target/riscv: calloc() memory per register.	Tim Newsome	2	-8/+5
2021-12-03	target,flash: allow target_free_working_area on NULL area pointer	Tomas Vanek	1	-4/+1
2021-11-20	riscv: Clear type 6 triggers on connecting.	Tim Newsome	1	-0/+4
2021-11-20	riscv: Regenerated debug_defines.h and encoding.h	Jan Matyas	2	-165/+1705
2021-10-25	riscv: use relative path to include contrib's data	Antonio Borneo	1	-2/+2
2021-10-25	Upstream a whole host of RISC-V changes.	Tim Newsome	9	-1639/+2601
2021-10-02	helper: Remove src/helper from include dirs	Yasushi SHOJI	4	-7/+7
2021-07-24	openocd: remove NULL comparisons with checkpatch [1/2]	Antonio Borneo	2	-3/+3
2021-07-24	openocd: fix simple cases of NULL comparison	Antonio Borneo	2	-8/+8
2021-07-20	openocd: manually fix Yoda conditions	Antonio Borneo	2	-7/+7
2021-06-26	target/riscv: Implement get_gdb_arch()	Jesse Sheridan	1	-0/+13
2021-06-18	Use boolean argument for register_get_by_name()	Marc Schink	1	-5/+5
2021-06-04	Add target_data_bits().	Tim Newsome	1	-0/+9
2021-05-22	riscv: replace macro DIM() with ARRAY_SIZE()	Antonio Borneo	3	-15/+9
2021-05-22	riscv: drop unused variable	Antonio Borneo	1	-3/+0
2021-05-08	target/riscv: Change 'authdata_read' output	Marc Schink	1	-1/+1
2021-03-19	Implement CRC32 algorithm for RISC-V.	Tim Newsome	1	-1/+80