riscv-tools/riscv-openocd.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-05-06	Improved handling of unavailable hartsexamine_unavailable_harts_squash	cgsfv	4	-202/+305
2024-01-26	Revert "break from long loops on shutdown request"	Evgeniy Naydanov	4	-18/+0
2024-01-25	Merge pull request #997 from en-sc/en-sc/priv-access	Jan Matyas	2	-9/+14
2024-01-25	Merge pull request #1002 from en-sc/en-sc/arch-state	Jan Matyas	1	-0/+8
2024-01-25	Merge pull request #995 from en-sc/en-sc/ctx-fix	Jan Matyas	1	-4/+8
2024-01-24	target/riscv: report info about target during `poll`	Evgeniy Naydanov	1	-0/+8
2024-01-23	target/riscv: move read redirection for `priv` to `riscv-013.c`	Evgeniy Naydanov	2	-9/+14
2024-01-18	Merge pull request #992 from en-sc/en-sc/remove-hart-count	Jan Matyas	3	-26/+1
2024-01-18	Merge pull request #990 from en-sc/en-sc/dmi-defines	Jan Matyas	1	-6/+6
2024-01-18	Merge pull request #991 from en-sc/en-sc/dm-dmi-address-conversion	Jan Matyas	3	-112/+122
2024-01-16	target/riscv: cleanup `get_riscv_debug_reg_ctx()`	Evgeniy Naydanov	1	-4/+8
2024-01-16	target/riscv: fix addressing in `dm_read`/`dm_wirte`	Evgeniy Naydanov	3	-112/+122
2024-01-16	target/riscv: remove `riscv_hart_count()`	Evgeniy Naydanov	3	-26/+1
2024-01-10	[NFC] target/riscv: use defined constants in `dmi_*_t` enums	Evgeniy Naydanov	1	-6/+6
2024-01-09	break from long loops on shutdown request	Evgeniy Naydanov	4	-0/+18
2023-12-22	rename dbgbuf to progbuf	Parshintsev Anatoly	5	-70/+69
2023-12-22	introduce execution status for riscv_program	Parshintsev Anatoly	5	-80/+140
2023-12-15	Clean up clang static analyzer complaints.	Tim Newsome	2	-30/+27
2023-12-11	Merge pull request #959 from en-sc/en-sc/progbuf-mem-write	Tim Newsome	5	-146/+273
2023-12-07	Update riscv/debug_defines (to sync with riscv-debug-spec:40b9a05)	Kirill Radkin	5	-1297/+850
2023-12-07	target/riscv: improve error handling in `write_memory_progbuf()`	Evgeniy Naydanov	5	-146/+273
2023-12-01	target/riscv: avoid using VLA in `log_debug_reg()`	Evgeniy Naydanov	1	-1/+6
2023-12-01	target/riscv: report helpfull location during register decode	Evgeniy Naydanov	1	-4/+6
2023-11-17	Merge pull request #963 from kr-sc/kr-sc/no-free-triggers	Tim Newsome	1	-1/+1
2023-11-16	Merge pull request #958 from riscv/set_field_get_field	Tim Newsome	5	-39/+73
2023-11-16	Merge pull request #957 from riscv/sbbusyerror	Tim Newsome	1	-7/+37
2023-11-16	When an attempt to set watchpoint fails because there is no free triggers Ope...	Kirill Radkin	1	-1/+1
2023-11-15	target/riscv: Handle sbbusyerror in read_memory_bus_v1	Tim Newsome	1	-7/+37
2023-11-15	target/riscv: Replace [sg]et_field macros with functions.	Tim Newsome	5	-39/+73
2023-11-15	target/riscv: replace `__PRETTY_FUNCTION__` with `__func__`	Evgeniy Naydanov	2	-6/+5
2023-11-15	target/riscv: dump_field() shouldn't always decode	Evgeniy Naydanov	1	-10/+14
2023-11-13	Merge pull request #961 from en-sc/en-sc/coreid-target-riscv	Tim Newsome	2	-6/+6
2023-11-10	Merge pull request #928 from AnastasiyaChernikova/triggers	Tim Newsome	2	-9/+146
2023-11-10	target/riscv: clarify usage of `coreid`	Evgeniy Naydanov	2	-6/+6
2023-11-09	target/riscv: Replace watchpoint value mask comparison value with macro.	Marek Vrbka	1	-4/+1
2023-11-07	Merge pull request #954 from riscv/from_upstream	Tim Newsome	1	-1/+1
2023-11-07	Merge pull request #952 from MarekVCodasip/stop-caching-dpc	Tim Newsome	1	-2/+0
2023-11-07	target/riscv: cache requests to trigger configuration	Anastasiya Chernikova	2	-9/+146
2023-11-06	Merge commit '05ee88915520d1dd82da94a016a9374a1f3a8129' into from_upstream	Tim Newsome	1	-1/+1
2023-11-03	target/riscv: gdb_regno_name takes an enum.	Tim Newsome	1	-1/+1
2023-11-03	Merge pull request #896 from AnastasiyaChernikova/ac-sc2	Tim Newsome	5	-482/+298
2023-11-03	Merge pull request #947 from riscv/from_upstream	Tim Newsome	1	-1/+1
2023-11-03	target/riscv: Stop caching writes to DPC	Marek Vrbka	1	-2/+0
2023-11-02	Merge pull request #945 from kr-sc/kr-sc/fix-mmu-access-upstream	Tim Newsome	1	-19/+29
2023-11-02	target/riscv: Adding register tables to make register names consistent	Anastasiya Chernikova	5	-482/+298
2023-10-30	target/riscv: Prevent dump_field() reading uninitialized memory	Tim Newsome	1	-1/+6
2023-10-30	target/riscv: Fix memory access when MMU is enabled and address couldn't be t...	Kirill Radkin	1	-19/+29
2023-10-27	Merge commit '9f23a1d7c1e27c556ef9787b9d3f263f5c1ecf24' into from_upstream	Tim Newsome	1	-1/+1
2023-10-25	target/riscv: update debug register printers	Evgeniy Naydanov	1	-4/+6
2023-10-24	Merge pull request #941 from kr-sc/kr-sc/fix-hgatp-mode-upstream	Tim Newsome	1	-1/+1