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riscv-tools/riscv-openocd.git
FE_402_fix
__archive__
add_macos_build
autoconf
bscan_optimization
bscan_tunnel
buf_sget
build32
busy
compliance_dev
debug-log-reg-failure
deinit
dmi_read
dmstatus_version
dsp5680_build
eclipse_memory_read
eclipse_multicore_fix
examine_command
examine_unavailable_harts
examine_unavailable_harts_backup
examine_unavailable_harts_rebase
examine_unavailable_harts_squash
fence_i_fix_for_release
fix-halt-reason-after-singlestep
fix_macbuild
gd32vf103
gdb_next_port
gitignore-build
global
halt_examine
haltreq
hypervisor_translate
jlink
log_output
macbuild
macro
manual_hwbp
master
mem64
mpsse_flush
multicore
new_bscan_approach
newprogram
nohartstatus
old_fixes_and_eclipse_memory_read
old_triggers
print_port
race
rbb_cleanup
regcache
regression_test_janmat_experim
release
remove-slot_t-from-riscv-013
reset_test
reverse-resume-order
riscv
riscv-batch-cleanup
riscv-compliance
riscv-compliance-dev
s2_increment
sba_tests
set_group
static
travis-nop
update_defines
us_xds110
vector2
winbuild
wip
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Author
Files
Lines
2024-05-28
target/riscv: do not emit warnings when a non-existent CSR is hidden
Parshintsev Anatoly
1
-1
/
+1
2024-05-17
Merge pull request #1029 from MrAlexei/add_decode_wp_rvc
Evgeniy Naydanov
1
-30
/
+467
2024-05-02
Merge pull request #1028 from en-sc/en-sc/busy-reset-batch
Evgeniy Naydanov
1
-4
/
+3
2024-04-30
Add functions to decode RVC load and store instructions
Aleksey Lotosh
1
-30
/
+467
2024-04-27
Merge pull request #1031 from aap-sc/aap-sc/hart_status_info_fixup
Evgeniy Naydanov
1
-8
/
+31
2024-04-27
Merge pull request #1055 from aap-sc/aap-sc/bp_unitialized
Evgeniy Naydanov
1
-3
/
+7
2024-04-26
target/riscv: reset delays during batch scans
Evgeniy Naydanov
1
-4
/
+3
2024-04-24
fix confusing status messages during resume
Parshintsev Anatoly
1
-8
/
+31
2024-04-24
target/riscv: use breakpoint_hw_set/watchpoint_set to properly initialize bp/...
Parshintsev Anatoly
1
-3
/
+7
2024-04-19
target/riscv: decode DMI scans in batch access
Evgeniy Naydanov
1
-1
/
+1
2024-04-05
target/riscv: read registers are not valid on a running target
Evgeniy Naydanov
1
-1
/
+2
2024-03-21
[NFC] target/riscv: refactor `init_registers()`
Evgeniy Naydanov
1
-377
/
+518
2024-03-07
Merge up to 07141132a7d787005c0829618a60b4a842be7847 from upstream
Evgeniy Naydanov
1
-1
/
+1
2024-02-27
Merge pull request #977 from kr-sc/kr-sc/improve-riscv-controls
Evgeniy Naydanov
1
-77
/
+65
2024-02-24
src/target/riscv: Help older compilers
Sevan Janiyan
1
-1
/
+1
2024-02-21
Merge pull request #1014 from riscv-collab/riscv-batch-cleanup
Evgeniy Naydanov
1
-8
/
+8
2024-02-13
target/riscv: Improve riscv controls that manage the set of available trigger...
Kirill Radkin
1
-77
/
+65
2024-02-12
Merge pull request #1011 from en-sc/en-sc/wa-halt-groups
Jan Matyas
1
-0
/
+6
2024-02-09
Merge pull request #1008 from en-sc/en-sc/from_upstream
Jan Matyas
1
-1
/
+1
2024-02-06
Fixes and cleanup in riscv batch and related functions
Jan Matyas
1
-8
/
+8
2024-02-02
target/riscv: set `state` and `debug_reason` in `riscv_halt_go_all_harts()`
Evgeniy Naydanov
1
-0
/
+6
2024-01-29
Merge up to 9659a9b5e28dc615dfb508d301fdd8fa426c191b from upstream
Evgeniy Naydanov
1
-1
/
+1
2024-01-28
target: get_gdb_arch() accepts target via const pointer
Evgeniy Naydanov
1
-1
/
+1
2024-01-26
Revert "break from long loops on shutdown request"
Evgeniy Naydanov
1
-6
/
+0
2024-01-25
Merge pull request #997 from en-sc/en-sc/priv-access
Jan Matyas
1
-9
/
+1
2024-01-24
target/riscv: report info about target during `poll`
Evgeniy Naydanov
1
-0
/
+8
2024-01-23
target/riscv: move read redirection for `priv` to `riscv-013.c`
Evgeniy Naydanov
1
-9
/
+1
2024-01-18
Merge pull request #992 from en-sc/en-sc/remove-hart-count
Jan Matyas
1
-10
/
+0
2024-01-18
Merge pull request #991 from en-sc/en-sc/dm-dmi-address-conversion
Jan Matyas
1
-108
/
+106
2024-01-16
target/riscv: fix addressing in `dm_read`/`dm_wirte`
Evgeniy Naydanov
1
-108
/
+106
2024-01-16
target/riscv: remove `riscv_hart_count()`
Evgeniy Naydanov
1
-10
/
+0
2024-01-09
break from long loops on shutdown request
Evgeniy Naydanov
1
-0
/
+6
2023-12-22
rename dbgbuf to progbuf
Parshintsev Anatoly
1
-13
/
+13
2023-12-22
introduce execution status for riscv_program
Parshintsev Anatoly
1
-2
/
+2
2023-11-17
Merge pull request #963 from kr-sc/kr-sc/no-free-triggers
Tim Newsome
1
-1
/
+1
2023-11-16
Merge pull request #958 from riscv/set_field_get_field
Tim Newsome
1
-4
/
+1
2023-11-16
When an attempt to set watchpoint fails because there is no free triggers Ope...
Kirill Radkin
1
-1
/
+1
2023-11-15
target/riscv: Replace [sg]et_field macros with functions.
Tim Newsome
1
-4
/
+1
2023-11-13
Merge pull request #961 from en-sc/en-sc/coreid-target-riscv
Tim Newsome
1
-2
/
+2
2023-11-10
Merge pull request #928 from AnastasiyaChernikova/triggers
Tim Newsome
1
-9
/
+140
2023-11-10
target/riscv: clarify usage of `coreid`
Evgeniy Naydanov
1
-2
/
+2
2023-11-09
target/riscv: Replace watchpoint value mask comparison value with macro.
Marek Vrbka
1
-4
/
+1
2023-11-07
Merge pull request #954 from riscv/from_upstream
Tim Newsome
1
-1
/
+1
2023-11-07
Merge pull request #952 from MarekVCodasip/stop-caching-dpc
Tim Newsome
1
-2
/
+0
2023-11-07
target/riscv: cache requests to trigger configuration
Anastasiya Chernikova
1
-9
/
+140
2023-11-06
Merge commit '05ee88915520d1dd82da94a016a9374a1f3a8129' into from_upstream
Tim Newsome
1
-1
/
+1
2023-11-03
target/riscv: gdb_regno_name takes an enum.
Tim Newsome
1
-1
/
+1
2023-11-03
Merge pull request #896 from AnastasiyaChernikova/ac-sc2
Tim Newsome
1
-463
/
+275
2023-11-03
Merge pull request #947 from riscv/from_upstream
Tim Newsome
1
-1
/
+1
2023-11-03
target/riscv: Stop caching writes to DPC
Marek Vrbka
1
-2
/
+0
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