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2020-02-14Add support for vector register access (#448)Tim Newsome1-1/+2
* WIP Change-Id: I0264a73b7f7d2ce89cc0b80692dbf81d9cdcc2fd * Reading v* registers appears to work. Can't really test it though, because gdb doesn't print them right. Change-Id: I8d66339371c564a493d32f15c3d114b738a455c5 * Total hack to communicate registers to gdb. Change-Id: Id06c819675f2a5bcaf751e322d95a7d71c633765 * Implement writing vector registers. Fixed reading vector registers. Change-Id: I8f06aa5ee5020b3213a4f68644c205c9d6b9d214 * Show gdb the actual size of the vector registers. This length may be different per hart. Change-Id: I92e95383da82ee7a5c995822a53d51b1ea933493 * Remove outdated todo comment. Change-Id: Ic9158b002858f0d15a6452773b095aa5f4501128 * Removed TODO comment. Filed #449 to track this. Change-Id: I5277b19e545df2024f34cda39158ddf7d0d89d47 * Nicely handle some errors reading/writing V regs. Change-Id: Ia7bb63a5f9433d9f7b46496b2c0994864cfc4a09
2019-11-04Add support for 64-bit memory reads/writes (#419)Tim Newsome1-0/+10
* 64-bit progbuf memory reads work. Change-Id: Ia3dbc0ee39a31ed0e5c38bbb3d9e089b2533f399 * 64-bit writes work. Change-Id: Iae78711d715b6682817bb7cce366b0094bda8b23 * Let targets indicate number of supported data bits. This is used by the default memory read/write functions when creating an aligned block. I'm adding this mainly to ensure I get coverage of the 64-bit progbuf memory read/write code. Change-Id: Ie5909fe537c9ec3360a8d2837f84be00a63de77b * Make mingw32 happy. Change-Id: Iade8c1fdfc72ccafc82f2f34923577032b668916
2019-07-18Access memory through the scope of current privilege level (#386)Nils Wistoff1-0/+12
* add opcode for csrrsi and csrrci * enable MMU while reading/writing memory using progbuf * fix style issues * keep old behavior for progbufsize<4, perform r/w/csr only when necessary * do not pass progbufsize, only write mstatus if changed * add config option to enable virtualization feature * throw error if virt enabled but unavaliable, outsource modify_privilege * support virtualization for read_memory_progbuf_one
2019-05-16More helpful debug output. (#374)Tim Newsome1-1/+1
I often want to see what OpenOCD is telling gdb, and it's annoying to have to recompile. Change-Id: Icce07606f253d67e2523cf2732dbe5042c6e483e
2018-03-02Don't always error if a debug program failsTim Newsome1-1/+1
This is often expected, and the calling code should decide whether to emit an error or not. Change-Id: Ic21f38b4c75f01e6b40034fdc60dde6ba7a55f4a
2018-01-08Propagate register read errors.Tim Newsome1-1/+3
Change-Id: Idda111377873a2236b5b91e4ffdabd2be384b47a
2017-12-27Get rid of abort() calls.Tim Newsome1-2/+1
Also changed a few asserts that could trigger due to broken hardware. Fixes Issue #142. Change-Id: Ia2b99baa82f30ebcb2fd7e4902f0e67046ce4ed2
2017-12-26Conform to OpenOCD style guide.Tim Newsome1-4/+3
Change-Id: I2b23ac79639ed40e9d59db5c52ea2196df0349bc
2017-12-19Fix register names.Tim Newsome1-4/+4
Use the ABI ones for every register that we have one for. Change-Id: I2a993abff416d2652dbe026b3fb498e144a5006f
2017-10-23Remove unused functionality.Tim Newsome1-225/+0
Change-Id: Ic70cebd62bbd04f7ae5566504fbb279a11de57f0
2017-10-18Pay attention to impebreak.Tim Newsome1-3/+4
This required updating debug_defines.h, which caused a few other small cleanups as well. Change-Id: I3c2cb418d7eff3093d7664c5563b2af5e8b530eb
2017-10-18Remove unused functionality.Tim Newsome1-61/+2
Change-Id: I0c1464e2e6aa12d0cb1025ed0a7c1c483e7403b7
2017-10-16Memtest{16,32} pass.Tim Newsome1-12/+7
Change-Id: I15c2a4fd2bb9a7b30762d07f3b3a74d2f477746b
2017-10-13At least some memory writes work.Tim Newsome1-10/+13
Change-Id: I6fcf261341f10ec34df01bb844744439d02471a8
2017-10-12Register read/write might be working.Tim Newsome1-1/+2
Change-Id: I6c51d6157dde56d8cd666b4d30ec7bbc7a4bef9f
2017-10-12WIP; doesn't work.Tim Newsome1-71/+0
Change-Id: Ia407e82ccbd2044ad61e0845d285dd5765154476
2017-10-03target/riscv/program.c: fix clang warningLiviu Ionescu1-1/+5
- I'm not sure I understand the logic behind the original statement, but on macOS it fails to compile.
2017-09-18Remove unnecessary abs().Tim Newsome1-1/+1
2017-09-14Add support for F extension.Tim Newsome1-4/+27
2017-08-15Add some keep_alive()s for use with slow targets.Tim Newsome1-0/+2
2017-06-16Tighten up debug output.Tim Newsome1-17/+14
Assuming the program allocating code works, we don't need its output. Only output parts of the debug RAM that are actually doing something.
2017-06-06%p already includes 0x (on gcc)Tim Newsome1-4/+4
2017-04-26Add 64-bit and multihart supportPalmer Dabbelt1-0/+491
This is a major rewrite of the RISC-V v0.13 OpenOCD port. This shouldn't have any meaningful effect on the v0.11 support, but it does add generic versions of many functions that will allow me to later refactor the v0.11 support so it's easier to maintain both ports. This started as an emergency feature branch and went on for a long time, so it's all been squashed down into one commit so there isn't a big set of broken commits lying around. The changes are: * You can pass "-rtos riscv" to the target in OpenOCD's configuration file, which enables multi-hart mode. This uses OpenOCD's RTOS support to control all the harts from the debug module using commands like "info threads" in GDB. This support is still expermental. * There is support for RV64I, but due to OpenOCD limitations we only support 32-bit physical addresses. I hope to remedy this by rebasing onto the latest OpenOCD release, which I've heard should fix this. * This matches the latest draft version of the RISC-V debug spec, as of April 26th. This version fixes a number of spec bugs and should be close to the final debug spec.
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