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2015-02-11sim3x: new flash driver for Silabs SiM3 microcontroller familyAndreas Bomholtz1-0/+81
This is a new driver for Silicon Laboratories SiM3 microcontroller family, based on the work of Ladislav Bábel. The driver will try to detect the type of MCU from the device id register, and if this fails it will use the flash size from the flash bank command. Driver added to the documentation and to the README. TCL script added. Tests: * Hardware: SiM3C166 (pre-production) and SiM3U167 * Binary: 4kb, 197kb, 256kb * Flash protect not tested Change-Id: I701e0cf505ca8ad99be7f83543fe5055b2f65dcc Signed-off-by: Andreas Bomholtz <andreas@seluxit.com> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2078 Tested-by: jenkins
2015-02-11nrf51 - Add async loader. Performance on nrf51822QAA/stlink-v2 from ↵Angus Gratton1-0/+72
~3.5KiB/s to ~19.5KiB/s. Change-Id: Ib0bf41a0cec85f0bd5728551f8ad7f6255e4ea04 Signed-off-by: Angus Gratton <gus@projectgus.com> [spamjunkeater@gmail.com: Cleanup buffer allocation, detect -1 for unknown pages] Signed-off-by: Erdem U. Altunyurt <spamjunkeater@gmail.com> Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2204 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-11-24flash/nor/lpcspifi.c: fix bug that prevented clean reset after flash writeAnders1-0/+12
After SPI flash was written by the assembly language stub, the last SPI command was not terminated by raising CS. This left the SPI device in a hung state that prevented the flash from being read by the M4 SPIFI controller, even after the M4 was fully reset. To access the flash via SPIFI, it was necessary to completely power cycle the board. This fix adds the missing instructions to raise CS and terminate the SPI command after the last byte. This allows the M4 to be resumed or reset cleanly after flashing. The SPIFI memory is now immediately accessable at address 0x1400 0000 after flashing is complete. Change-Id: I4d5e03bded0fa00c430c2991f182dc18611d5f48 Signed-off-by: Anders <anders@openpuma.org> Reviewed-on: http://openocd.zylin.com/2359 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-09-22flash/nor: add mrvlqspi flash controller driverMahavir Jain1-0/+232
This patch adds support for QSPI flash controller driver for Marvell's Wireless Microcontroller platform. For more information please refer, https://origin-www.marvell.com/microcontrollers/wi-fi-microcontroller-platform/ Following things have been tested on 88MC200 (Winbond W25Q80BV flash chip): 1. Flash sector level erase 2. Flash chip erase 3. Flash write in normal SPI mode 4. Flash fill (write and verify) in normal SPI mode Change-Id: If4414ae3f77ff170b84e426a35b66c44590c5e06 Signed-off-by: Mahavir Jain <mjain@marvell.com> Reviewed-on: http://openocd.zylin.com/2280 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-03-29Move ocl (at91sam7x flash loader) sources to contribPaul Fertser12-0/+1091
Change-Id: Ib5c3c505a067d0e285a7b074cb6fddebfa6dda1e Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1904 Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk> Tested-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-08-07mdr32fx: support for Milandr's MDR32Fx internal flash memoryPaul Fertser1-0/+125
This adds example config and flash driver for russian Cortex-M3 microcontroller model. Run-time tested on MDR32F9Q2I evaluation board; the flash driver should be compatible with MDR32F2x (Cortex-M0) too but I lack hardware to test. There're no status bits at all, the datasheets specifies some delays for flash operations instead. All being in <100us range, they're hard to violate with JTAG, I hope. There're also no flash identification registers so the flash size and type has to be hardcoded into the config. The flashing is considerably complicated because the flash is split into pages, and each page consists of 4 interleaved non-consecutive "sectors" (on MDR32F9 only, MDR32F2 is single-sectored), so the fastest way is to latch the page and sector address and then write only the part that should go into the current page and current sector. Performance testing results with adapter_khz 1000 and the chip running on its default HSI 8MHz oscillator: When working area is specified, a target helper algorithm is used: wrote 131072 bytes from file testfile.bin in 3.698427s (34.609 KiB/s) This can theoretically be sped up by ~1.4 times if the helper algorithm is fed some kind of "loader instructions stream" to allow sector-by-sector writing. Pure JTAG implementation (when target memory area is not available) flashes all the 128k memory in 49.5s. Flashing "info" memory region is also implemented, but due to the overlapping memory addresses (resulting in incorrect memory map calculations for GDB) it can't be used at the same time, so OpenOCD needs to be started this way: -c "set IMEMORY true" -f target/mdr32f9q2i.cfg It also can't be read/verified because it's not memory-mapped anywhere ever, and OpenOCD NOR framework doesn't really allow to provide a custom handler that would be used when verifying. Change-Id: I80c0632da686d49856fdbf9e05d908846dd44316 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1532 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-07-01Support for SST 39VF3201C NOR flashIS2T1-0/+72
* Add Thumb-2 code to write flash memories that don't support DQ5 polling * Make sure default values for unlock commands are set even if there is no PRI information given by the flash * Add a fixup to disable DQ5 polling for the SST 39VF3201C Change-Id: Ib08cf20547d0f500d5f78241521e6b49050c3d40 Signed-off-by: IS2T development team <dev.is2t@gmail.com> Reviewed-on: http://openocd.zylin.com/1449 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-06-05update files to correct FSF addressSpencer Oliver20-24/+24
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1426 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2013-04-02Added support for ARMv7-M in arm io.Henrik Nilsson1-0/+60
Added support for ARMv7-M targets in arm_nandwrite and arm_nandread. Change-Id: Iab1d78d401f735e191c6a8519f3619035a300fae Signed-off-by: Henrik Nilsson <henrik.nilsson@bytequest.se> Reviewed-on: http://openocd.zylin.com/1188 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-01-14flash: EFM32 flash implementationRoman D1-0/+114
Limited (no page unprotect, no block writes) implementation of EFM32 flash support. Verified with EFM32 development kit and STLink V2 adapter using SWD. Change-Id: I3db2054d9aa628a1fe4814430425db3c9959c71c Signed-off-by: Roman D <me@iamroman.org> Reviewed-on: http://openocd.zylin.com/1106 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-09-26Added SPIFI flash driver, algorithms, and docsGeorge Harris3-0/+488
Added a flash driver designed to allow program/erase of memory-mapped SPI flash chips for LPC43xx/LPC18xx family micros. This driver includes three algorithms - erase, write, and SPIFI peripheral initialization (to allow memory-mapped access after a reset). The driver has been added to the flash driver table (drivers.c), and the OpenOCD documentation has been updated to include the flash driver configuration command. Change-Id: I79f4ff8f1f07de4e5f2fe4f8c23aeb903f868514 Signed-off-by: George Harris <george@luminairecoffee.com> Reviewed-on: http://openocd.zylin.com/783 Tested-by: jenkins Reviewed-by: Aurelien Jacobs <aurel@gnuage.org> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-30flash: don't write to FLASH_CR in stm32x_write_blockAndreas Fritiofson1-3/+0
It's unnecessary and prevents reusing this function to fix option byte writes. Also try to disable flash writing after an error. Change-Id: Ib5a7b768a1523e6b8da1555126fef4c1e60ab083 Signed-off-by: Szymon Modzelewski <szmodzelewski@gmail.com> Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/479 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-02-26flash: add stm32f2x async flash loaderSpencer Oliver1-25/+42
This enable the stm32f2x flash driver to use the asynchronous algorithm support. Speed increase is as follows: before - wrote 1048576 bytes from file stm32f4x.bin in 30.453804s (33.625 KiB/s) after - wrote 1048576 bytes from file stm32f4x.bin in 23.679497s (43.244 KiB/s) This also fixes a bug that was in the old flash loader. The old loader waited while bit16 of the status reg was 0, the new loader waits until this bit is 0 as stated in the flash spec. Bizarrely this bug did not effect programming on any tested parts. Change-Id: I3efc94d42cbe81283673a8f4203700638080af6e Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/460 Tested-by: jenkins
2012-02-26flash: add stellaris async flash loaderSpencer Oliver1-30/+42
This enable the Stellaris flash driver to use the asynchronous algorithm support. Speed increase is as follows: before - wrote 65536 bytes from file test.bin in 5.486040s (11.666 KiB/s) after - wrote 65536 bytes from file test.bin in 2.274001s (28.144 KiB/s) Change-Id: I9004c9aadffa1ae3b0cbf908e6549b5b1f794508 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/403 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-01-30stm32f1x: fix bug in flash loader and restrict instruction set to armv6-mAndreas Fritiofson1-10/+18
Correct the offset to the read pointer when clearing it on error. Also restrict the instruction set to armv6-m so the flash driver can be used on Cortex-M0 parts with the same flash controller. Change-Id: I380f9dabcc41fb6e4d43a7e02f355e2381913f39 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/399 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-17contrib: stm32f2x use std naming rulesSpencer Oliver1-0/+0
Change-Id: I109297aa480b3474f1251571cb8e1a0baa1442fd Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/195 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-10-09stm32f1x: use async algorithm in flash programming routineAndreas Fritiofson1-29/+42
Let the target algorithm be running in the background and buffer data continuously through a FIFO. This reduces or removes the effect of latency because only a very small number of queue executions needs to be done per buffer fill. Previously, the many repeated target state changes, register accesses (really inefficient) and algorithm uploads caused the flash programming to be latency bound in many cases. Now it should scale better with increased throughput. Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2011-10-03STM32L: Added flash driver and targetClément Burin des Roziers1-0/+63
Added the flash driver for the STM32L family, which highly differ from the STM32F family. Added the TCL target file for JTAG access.
2011-02-04stm32x: add support for STM32F20xØyvind Harboe1-0/+63
ready for wider testing and comments on basic erase + programming. Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2011-01-06loader: update loader src for armv7-m archSpencer Oliver1-3/+5
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2011-01-06Add the contrib file for the armv7m archJonathan Dumaresq1-0/+79
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
2010-12-23stm32: add dual flash bank supportSpencer Oliver1-2/+3
This patch adds the initial dual flash bank support for devices such as the stm32xl family. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-23contrib: change stm32 flash loader extensionSpencer Oliver1-0/+0
As the stm32 flash loader now uses the preprocessor change extension so that it used by default. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-10contrib: add source to the cfi flash loadersSpencer Oliver7-0/+462
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-12-10contrib: make sure loaders use correct archSpencer Oliver4-0/+6
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-11-15Add comments and tiny improvements to STM32 flash loader algorithmFreddie Chopin1-18/+22
Add comments to assembly flash loader for STM32. Add tiny improvement in size of the algorithm (40 vs 48 bytes) and tiny speed improvement (~1.5%, as time is wasted on waiting for end of operation anyway). Signed-off-by: Freddie Chopin <freddie_chopin@op.pl>
2010-10-28contrib: add ram loader src codeSpencer Oliver5-0/+360
Add src code for ram loaders to contrib directory. Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
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