1 files changed, 83 insertions, 0 deletions
diff --git a/tcl/target/esp32s3.cfg b/tcl/target/esp32s3.cfg
new file mode 100644
index 0000000..0570501
--- /dev/null
+++ b/tcl/target/esp32s3.cfg
@@ -0,0 +1,83 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# The ESP32-S3 only supports JTAG.
+transport select jtag
+
+set CPU_MAX_ADDRESS 0xFFFFFFFF
+source [find bitsbytes.tcl]
+source [find memory.tcl]
+source [find mmr_helpers.tcl]
+
+if { [info exists CHIPNAME] } {
+	set _CHIPNAME $CHIPNAME
+} else {
+	set _CHIPNAME esp32s3
+}
+
+if { [info exists CPUTAPID] } {
+	set _CPUTAPID $CPUTAPID
+} else {
+	set _CPUTAPID 0x120034e5
+}
+
+if { [info exists ESP32_S3_ONLYCPU] } {
+	set _ONLYCPU $ESP32_S3_ONLYCPU
+} else {
+	set _ONLYCPU 2
+}
+
+set _CPU0NAME cpu0
+set _CPU1NAME cpu1
+set _TARGETNAME_0 $_CHIPNAME.$_CPU0NAME
+set _TARGETNAME_1 $_CHIPNAME.$_CPU1NAME
+
+jtag newtap $_CHIPNAME $_CPU0NAME -irlen 5 -expected-id $_CPUTAPID
+if { $_ONLYCPU != 1 } {
+	jtag newtap $_CHIPNAME $_CPU1NAME -irlen 5 -expected-id $_CPUTAPID
+} else {
+	jtag newtap $_CHIPNAME $_CPU1NAME -irlen 5 -disable -expected-id $_CPUTAPID
+}
+
+proc esp32s3_memprot_is_enabled { } {
+	# TODO: after https://review.openocd.org/c/openocd/+/7016 merged
+	return 0
+}
+
+# PRO-CPU
+target create $_TARGETNAME_0 $_CHIPNAME -endian little -chain-position $_TARGETNAME_0 -coreid 0
+# APP-CPU
+if { $_ONLYCPU != 1 } {
+	target create $_TARGETNAME_1 $_CHIPNAME -endian little -chain-position $_TARGETNAME_1 -coreid 1
+	target smp $_TARGETNAME_0 $_TARGETNAME_1
+}
+
+$_TARGETNAME_0 xtensa maskisr on
+$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
+
+$_TARGETNAME_0 configure -event gdb-attach {
+	$_TARGETNAME_0 xtensa smpbreak BreakIn BreakOut
+	# necessary to auto-probe flash bank when GDB is connected
+	halt 1000
+	if { [esp32s3_memprot_is_enabled] } {
+		# 'reset halt' to disable memory protection and allow flasher to work correctly
+		echo "Memory protection is enabled. Reset target to disable it..."
+		reset halt
+    }
+}
+$_TARGETNAME_0 configure -event reset-assert-post { soft_reset_halt }
+
+if { $_ONLYCPU != 1 } {
+	$_TARGETNAME_1 configure -event gdb-attach {
+		$_TARGETNAME_1 xtensa smpbreak BreakIn BreakOut
+		# necessary to auto-probe flash bank when GDB is connected
+		halt 1000
+		if { [esp32s3_memprot_is_enabled] } {
+			# 'reset halt' to disable memory protection and allow flasher to work correctly
+			echo "Memory protection is enabled. Reset target to disable it..."
+			reset halt
+		}
+	}
+	$_TARGETNAME_1 configure -event reset-assert-post { soft_reset_halt }
+}
+
+gdb_breakpoint_override hard