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Diffstat (limited to 'src/target/aarch64.c')
-rw-r--r--src/target/aarch64.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index 171c286..d43ade1 100644
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -252,7 +252,7 @@ static int aarch64_init_debug_access(struct target *target)
/* Write to memory mapped registers directly with no cache or mmu handling */
static int aarch64_dap_write_memap_register_u32(struct target *target,
- uint32_t address,
+ target_addr_t address,
uint32_t value)
{
int retval;
@@ -2571,7 +2571,7 @@ static int aarch64_examine_first(struct target *target)
armv8->debug_ap->memaccess_tck = 10;
if (!target->dbgbase_set) {
- uint32_t dbgbase;
+ target_addr_t dbgbase;
/* Get ROM Table base */
uint32_t apid;
int32_t coreidx = target->coreid;
@@ -2583,7 +2583,7 @@ static int aarch64_examine_first(struct target *target)
&armv8->debug_base, &coreidx);
if (retval != ERROR_OK)
return retval;
- LOG_DEBUG("Detected core %" PRId32 " dbgbase: %08" PRIx32
+ LOG_DEBUG("Detected core %" PRId32 " dbgbase: " TARGET_ADDR_FMT
" apid: %08" PRIx32, coreidx, armv8->debug_base, apid);
} else
armv8->debug_base = target->dbgbase;