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-rw-r--r--src/jtag/swd.h41
1 files changed, 41 insertions, 0 deletions
diff --git a/src/jtag/swd.h b/src/jtag/swd.h
index fe28667..8a436d0 100644
--- a/src/jtag/swd.h
+++ b/src/jtag/swd.h
@@ -18,6 +18,7 @@
#ifndef OPENOCD_JTAG_SWD_H
#define OPENOCD_JTAG_SWD_H
+#include <helper/log.h>
#include <target/arm_adi_v5.h>
/* Bits in SWD command packets, written from host to target
@@ -32,6 +33,12 @@
#define SWD_CMD_PARK (1 << 7) /* driven high by host */
/* followed by TRN, 3-bits of ACK, TRN */
+/*
+ * The SWD subsystem error codes
+ */
+#define ERROR_SWD_FAIL (-400) /** protocol or parity error */
+#define ERROR_SWD_FAULT (-401) /** device returned FAULT in ACK field */
+
/**
* Construct a "cmd" byte, in lSB bit order, which swd_driver.read_reg()
* and swd_driver.write_reg() methods will use directly.
@@ -53,6 +60,40 @@ static inline uint8_t swd_cmd(bool is_read, bool is_ap, uint8_t regnum)
/* SWD_ACK_* bits are defined in <target/arm_adi_v5.h> */
+/**
+ * Test if we can rely on ACK returned by SWD command
+ *
+ * @param cmd Byte constructed by swd_cmd(), START, STOP and TRN are filtered off
+ * @returns true if ACK should be checked, false if should be ignored
+ */
+static inline bool swd_cmd_returns_ack(uint8_t cmd)
+{
+ uint8_t base_cmd = cmd & (SWD_CMD_APNDP | SWD_CMD_RNW | SWD_CMD_A32);
+
+ /* DPv2 does not reply to DP_TARGETSEL write cmd */
+ return base_cmd != swd_cmd(false, false, DP_TARGETSEL);
+}
+
+/**
+ * Convert SWD ACK value returned from DP to OpenOCD error code
+ *
+ * @param ack
+ * @returns error code
+ */
+static inline int swd_ack_to_error_code(uint8_t ack)
+{
+ switch (ack) {
+ case SWD_ACK_OK:
+ return ERROR_OK;
+ case SWD_ACK_WAIT:
+ return ERROR_WAIT;
+ case SWD_ACK_FAULT:
+ return ERROR_SWD_FAULT;
+ default:
+ return ERROR_SWD_FAIL;
+ }
+}
+
/*
* The following sequences are updated to
* ARM(tm) Debug Interface v5 Architecture Specification ARM IHI 0031E