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-rw-r--r--LICENSES/preferred/CC0-1.0130
-rw-r--r--Makefile.am1
-rw-r--r--contrib/rtos-helpers/FreeRTOS-openocd.c2
-rw-r--r--doc/openocd.texi12
-rw-r--r--src/flash/nor/rsl10.c6
-rw-r--r--src/pld/certus.c1
-rw-r--r--src/target/arc.c10
-rw-r--r--src/target/etm.c4
-rw-r--r--src/target/mips64.c16
-rw-r--r--src/target/mips_mips64.c8
-rw-r--r--src/target/target.c21
-rw-r--r--tcl/board/ti_am243_launchpad.cfg25
-rw-r--r--tcl/board/ti_am263_launchpad.cfg25
-rw-r--r--tcl/board/ti_am273_launchpad.cfg25
-rw-r--r--tcl/target/ti_k3.cfg117
15 files changed, 350 insertions, 53 deletions
diff --git a/LICENSES/preferred/CC0-1.0 b/LICENSES/preferred/CC0-1.0
new file mode 100644
index 0000000..ba3c8c7
--- /dev/null
+++ b/LICENSES/preferred/CC0-1.0
@@ -0,0 +1,130 @@
+Valid-License-Identifier: CC0-1.0
+SPDX-URL: https://spdx.org/licenses/CC0-1.0.html
+Usage-Guide:
+ To use the Creative Commons Zero v1.0 Universal License put the following
+ SPDX tag/value pair into a comment according to the placement guidelines in
+ the licensing rules documentation:
+ SPDX-License-Identifier: CC0-1.0
+License-Text:
+
+Creative Commons Legal Code
+
+CC0 1.0 Universal
+
+ CREATIVE COMMONS CORPORATION IS NOT A LAW FIRM AND DOES NOT PROVIDE
+ LEGAL SERVICES. DISTRIBUTION OF THIS DOCUMENT DOES NOT CREATE AN
+ ATTORNEY-CLIENT RELATIONSHIP. CREATIVE COMMONS PROVIDES THIS
+ INFORMATION ON AN "AS-IS" BASIS. CREATIVE COMMONS MAKES NO WARRANTIES
+ REGARDING THE USE OF THIS DOCUMENT OR THE INFORMATION OR WORKS
+ PROVIDED HEREUNDER, AND DISCLAIMS LIABILITY FOR DAMAGES RESULTING FROM
+ THE USE OF THIS DOCUMENT OR THE INFORMATION OR WORKS PROVIDED
+ HEREUNDER.
+
+Statement of Purpose
+
+The laws of most jurisdictions throughout the world automatically confer
+exclusive Copyright and Related Rights (defined below) upon the creator
+and subsequent owner(s) (each and all, an "owner") of an original work of
+authorship and/or a database (each, a "Work").
+
+Certain owners wish to permanently relinquish those rights to a Work for
+the purpose of contributing to a commons of creative, cultural and
+scientific works ("Commons") that the public can reliably and without fear
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+and for any purposes, including without limitation commercial purposes.
+These owners may contribute to the Commons to promote the ideal of a free
+culture and the further production of creative, cultural and scientific
+works, or to gain reputation or greater distribution for their Work in
+part through the use and efforts of others.
+
+For these and/or other purposes and motivations, and without any
+expectation of additional consideration or compensation, the person
+associating CC0 with a Work (the "Affirmer"), to the extent that he or she
+is an owner of Copyright and Related Rights in the Work, voluntarily
+elects to apply CC0 to the Work and publicly distribute the Work under its
+terms, with knowledge of his or her Copyright and Related Rights in the
+Work and the meaning and intended legal effect of CC0 on those rights.
+
+1. Copyright and Related Rights. A Work made available under CC0 may be
+protected by copyright and related or neighboring rights ("Copyright and
+Related Rights"). Copyright and Related Rights include, but are not
+limited to, the following:
+
+ i. the right to reproduce, adapt, distribute, perform, display,
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+ ii. moral rights retained by the original author(s) and/or performer(s);
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+ iv. rights protecting against unfair competition in regards to a Work,
+ subject to the limitations in paragraph 4(a), below;
+ v. rights protecting the extraction, dissemination, use and reuse of data
+ in a Work;
+ vi. database rights (such as those arising under Directive 96/9/EC of the
+ European Parliament and of the Council of 11 March 1996 on the legal
+ protection of databases, and under any national implementation
+ thereof, including any amended or successor version of such
+ directive); and
+vii. other similar, equivalent or corresponding rights throughout the
+ world based on applicable law or treaty, and any national
+ implementations thereof.
+
+2. Waiver. To the greatest extent permitted by, but not in contravention
+of, applicable law, Affirmer hereby overtly, fully, permanently,
+irrevocably and unconditionally waives, abandons, and surrenders all of
+Affirmer's Copyright and Related Rights and associated claims and causes
+of action, whether now known or unknown (including existing as well as
+future claims and causes of action), in the Work (i) in all territories
+worldwide, (ii) for the maximum duration provided by applicable law or
+treaty (including future time extensions), (iii) in any current or future
+medium and for any number of copies, and (iv) for any purpose whatsoever,
+including without limitation commercial, advertising or promotional
+purposes (the "Waiver"). Affirmer makes the Waiver for the benefit of each
+member of the public at large and to the detriment of Affirmer's heirs and
+successors, fully intending that such Waiver shall not be subject to
+revocation, rescission, cancellation, termination, or any other legal or
+equitable action to disrupt the quiet enjoyment of the Work by the public
+as contemplated by Affirmer's express Statement of Purpose.
+
+3. Public License Fallback. Should any part of the Waiver for any reason
+be judged legally invalid or ineffective under applicable law, then the
+Waiver shall be preserved to the maximum extent permitted taking into
+account Affirmer's express Statement of Purpose. In addition, to the
+extent the Waiver is so judged Affirmer hereby grants to each affected
+person a royalty-free, non transferable, non sublicensable, non exclusive,
+irrevocable and unconditional license to exercise Affirmer's Copyright and
+Related Rights in the Work (i) in all territories worldwide, (ii) for the
+maximum duration provided by applicable law or treaty (including future
+time extensions), (iii) in any current or future medium and for any number
+of copies, and (iv) for any purpose whatsoever, including without
+limitation commercial, advertising or promotional purposes (the
+"License"). The License shall be deemed effective as of the date CC0 was
+applied by Affirmer to the Work. Should any part of the License for any
+reason be judged legally invalid or ineffective under applicable law, such
+partial invalidity or ineffectiveness shall not invalidate the remainder
+of the License, and in such case Affirmer hereby affirms that he or she
+will not (i) exercise any of his or her remaining Copyright and Related
+Rights in the Work or (ii) assert any associated claims and causes of
+action with respect to the Work, in either case contrary to Affirmer's
+express Statement of Purpose.
+
+4. Limitations and Disclaimers.
+
+ a. No trademark or patent rights held by Affirmer are waived, abandoned,
+ surrendered, licensed or otherwise affected by this document.
+ b. Affirmer offers the Work as-is and makes no representations or
+ warranties of any kind concerning the Work, express, implied,
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+ title, merchantability, fitness for a particular purpose, non
+ infringement, or the absence of latent or other defects, accuracy, or
+ the present or absence of errors, whether or not discoverable, all to
+ the greatest extent permissible under applicable law.
+ c. Affirmer disclaims responsibility for clearing rights of other persons
+ that may apply to the Work or any use thereof, including without
+ limitation any person's Copyright and Related Rights in the Work.
+ Further, Affirmer disclaims responsibility for obtaining any necessary
+ consents, permissions or other rights required for any use of the
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+ d. Affirmer understands and acknowledges that Creative Commons is not a
+ party to this document and has no duty or obligation with respect to
+ this CC0 or use of the Work.
diff --git a/Makefile.am b/Makefile.am
index ac08e41..bf839d6 100644
--- a/Makefile.am
+++ b/Makefile.am
@@ -66,6 +66,7 @@ EXTRA_DIST += \
LICENSES/preferred/BSD-2-Clause-Views \
LICENSES/preferred/BSD-3-Clause \
LICENSES/preferred/BSD-Source-Code \
+ LICENSES/preferred/CC0-1.0 \
LICENSES/preferred/GFDL-1.2 \
LICENSES/preferred/gfdl-1.2.texi.readme \
LICENSES/preferred/GPL-2.0 \
diff --git a/contrib/rtos-helpers/FreeRTOS-openocd.c b/contrib/rtos-helpers/FreeRTOS-openocd.c
index 000453d..5f82ac7 100644
--- a/contrib/rtos-helpers/FreeRTOS-openocd.c
+++ b/contrib/rtos-helpers/FreeRTOS-openocd.c
@@ -1,4 +1,4 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
+// SPDX-License-Identifier: CC0-1.0
/*
* Since at least FreeRTOS V7.5.3 uxTopUsedPriority is no longer
diff --git a/doc/openocd.texi b/doc/openocd.texi
index aaf0fb5..1312c5f 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -5325,6 +5325,18 @@ Displays the current target state:
(Also, @pxref{eventpolling,,Event Polling}.)
@end deffn
+@deffn {Command} {$target_name debug_reason}
+Displays the current debug reason:
+@code{debug-request},
+@code{breakpoint},
+@code{watchpoint},
+@code{watchpoint-and-breakpoint},
+@code{single-step},
+@code{target-not-halted},
+@code{program-exit},
+@code{exception-catch} or @code{undefined}.
+@end deffn
+
@deffn {Command} {$target_name eventlist}
Displays a table listing all event handlers
currently associated with this target.
diff --git a/src/flash/nor/rsl10.c b/src/flash/nor/rsl10.c
index 5f0ac9b..c286e9a 100644
--- a/src/flash/nor/rsl10.c
+++ b/src/flash/nor/rsl10.c
@@ -815,7 +815,8 @@ static const struct command_registration rsl10_exec_command_handlers[] = {
.help = "Mass erase all unprotected flash areas",
.usage = "",
},
- COMMAND_REGISTRATION_DONE};
+ COMMAND_REGISTRATION_DONE
+};
static const struct command_registration rsl10_command_handlers[] = {
{
@@ -825,7 +826,8 @@ static const struct command_registration rsl10_command_handlers[] = {
.usage = "",
.chain = rsl10_exec_command_handlers,
},
- COMMAND_REGISTRATION_DONE};
+ COMMAND_REGISTRATION_DONE
+};
const struct flash_driver rsl10_flash = {
.name = "rsl10",
diff --git a/src/pld/certus.c b/src/pld/certus.c
index a49501f..ccb3feb 100644
--- a/src/pld/certus.c
+++ b/src/pld/certus.c
@@ -121,6 +121,7 @@ static int lattice_certus_enable_programming(struct jtag_tap *tap)
uint8_t buffer = 0;
field.num_bits = 8;
field.out_value = &buffer;
+ field.in_value = NULL;
jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
jtag_add_runtest(2, TAP_IDLE);
return jtag_execute_queue();
diff --git a/src/target/arc.c b/src/target/arc.c
index 45005b2..0f7b110 100644
--- a/src/target/arc.c
+++ b/src/target/arc.c
@@ -1265,8 +1265,8 @@ static int arc_resume(struct target *target, int current, target_addr_t address,
/* current = 1: continue on current PC, otherwise continue at <address> */
if (!current) {
target_buffer_set_u32(target, pc->value, address);
- pc->dirty = 1;
- pc->valid = 1;
+ pc->dirty = true;
+ pc->valid = true;
LOG_DEBUG("Changing the value of current PC to 0x%08" TARGET_PRIxADDR, address);
}
@@ -1281,7 +1281,7 @@ static int arc_resume(struct target *target, int current, target_addr_t address,
resume_pc, pc->dirty, pc->valid);
/* check if GDB tells to set our PC where to continue from */
- if ((pc->valid == 1) && (resume_pc == target_buffer_get_u32(target, pc->value))) {
+ if (pc->valid && resume_pc == target_buffer_get_u32(target, pc->value)) {
value = target_buffer_get_u32(target, pc->value);
LOG_DEBUG("resume Core (when start-core) with PC @:0x%08" PRIx32, value);
CHECK_RETVAL(arc_jtag_write_aux_reg_one(&arc->jtag_info, AUX_PC_REG, value));
@@ -2007,8 +2007,8 @@ static int arc_step(struct target *target, int current, target_addr_t address,
/* current = 1: continue on current pc, otherwise continue at <address> */
if (!current) {
buf_set_u32(pc->value, 0, 32, address);
- pc->dirty = 1;
- pc->valid = 1;
+ pc->dirty = true;
+ pc->valid = true;
}
LOG_DEBUG("Target steps one instruction from PC=0x%" PRIx32,
diff --git a/src/target/etm.c b/src/target/etm.c
index 6718875..d083017 100644
--- a/src/target/etm.c
+++ b/src/target/etm.c
@@ -552,8 +552,8 @@ static int etm_set_reg(struct reg *reg, uint32_t value)
}
buf_set_u32(reg->value, 0, reg->size, value);
- reg->valid = 1;
- reg->dirty = 0;
+ reg->valid = true;
+ reg->dirty = false;
return ERROR_OK;
}
diff --git a/src/target/mips64.c b/src/target/mips64.c
index 37f3685..48f4563 100644
--- a/src/target/mips64.c
+++ b/src/target/mips64.c
@@ -247,8 +247,8 @@ static int mips64_set_core_reg(struct reg *reg, uint8_t *buf)
return ERROR_TARGET_NOT_HALTED;
buf_set_u64(reg->value, 0, 64, value);
- reg->dirty = 1;
- reg->valid = 1;
+ reg->dirty = true;
+ reg->valid = true;
return ERROR_OK;
}
@@ -265,8 +265,8 @@ static int mips64_read_core_reg(struct target *target, int num)
reg_value = mips64->core_regs[num];
buf_set_u64(mips64->core_cache->reg_list[num].value, 0, 64, reg_value);
- mips64->core_cache->reg_list[num].valid = 1;
- mips64->core_cache->reg_list[num].dirty = 0;
+ mips64->core_cache->reg_list[num].valid = true;
+ mips64->core_cache->reg_list[num].dirty = false;
return ERROR_OK;
}
@@ -284,8 +284,8 @@ static int mips64_write_core_reg(struct target *target, int num)
reg_value = buf_get_u64(mips64->core_cache->reg_list[num].value, 0, 64);
mips64->core_regs[num] = reg_value;
LOG_DEBUG("write core reg %i value 0x%" PRIx64 "", num, reg_value);
- mips64->core_cache->reg_list[num].valid = 1;
- mips64->core_cache->reg_list[num].dirty = 0;
+ mips64->core_cache->reg_list[num].valid = true;
+ mips64->core_cache->reg_list[num].dirty = false;
return ERROR_OK;
}
@@ -297,8 +297,8 @@ int mips64_invalidate_core_regs(struct target *target)
unsigned int i;
for (i = 0; i < mips64->core_cache->num_regs; i++) {
- mips64->core_cache->reg_list[i].valid = 0;
- mips64->core_cache->reg_list[i].dirty = 0;
+ mips64->core_cache->reg_list[i].valid = false;
+ mips64->core_cache->reg_list[i].dirty = false;
}
return ERROR_OK;
diff --git a/src/target/mips_mips64.c b/src/target/mips_mips64.c
index bf60953..9921e93 100644
--- a/src/target/mips_mips64.c
+++ b/src/target/mips_mips64.c
@@ -625,8 +625,8 @@ static int mips_mips64_resume(struct target *target, int current,
/* current = 1: continue on current pc, otherwise continue at <address> */
if (!current) {
buf_set_u64(pc->value, 0, 64, address);
- pc->dirty = 1;
- pc->valid = 1;
+ pc->dirty = true;
+ pc->valid = true;
}
resume_pc = buf_get_u64(pc->value, 0, 64);
@@ -717,8 +717,8 @@ static int mips_mips64_step(struct target *target, int current,
* <address> */
if (!current) {
buf_set_u64(pc->value, 0, 64, address);
- pc->dirty = 1;
- pc->valid = 1;
+ pc->dirty = true;
+ pc->valid = true;
}
/* the front-end may request us not to handle breakpoints */
diff --git a/src/target/target.c b/src/target/target.c
index b5a359d..cfd0641 100644
--- a/src/target/target.c
+++ b/src/target/target.c
@@ -5876,6 +5876,18 @@ COMMAND_HANDLER(handle_target_current_state)
return ERROR_OK;
}
+COMMAND_HANDLER(handle_target_debug_reason)
+{
+ if (CMD_ARGC != 0)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ struct target *target = get_current_target(CMD_CTX);
+
+ command_print(CMD, "%s", debug_reason_name(target));
+
+ return ERROR_OK;
+}
+
static int jim_target_invoke_event(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
{
struct jim_getopt_info goi;
@@ -6028,6 +6040,13 @@ static const struct command_registration target_instance_command_handlers[] = {
.usage = "",
},
{
+ .name = "debug_reason",
+ .mode = COMMAND_EXEC,
+ .handler = handle_target_debug_reason,
+ .help = "displays the debug reason of this target",
+ .usage = "",
+ },
+ {
.name = "arp_examine",
.mode = COMMAND_EXEC,
.handler = handle_target_examine,
@@ -6126,7 +6145,7 @@ static int target_create(struct jim_getopt_info *goi)
if (e != JIM_OK)
return e;
struct transport *tr = get_current_transport();
- if (tr->override_target) {
+ if (tr && tr->override_target) {
e = tr->override_target(&cp);
if (e != ERROR_OK) {
LOG_ERROR("The selected transport doesn't support this target");
diff --git a/tcl/board/ti_am243_launchpad.cfg b/tcl/board/ti_am243_launchpad.cfg
new file mode 100644
index 0000000..aa75dda
--- /dev/null
+++ b/tcl/board/ti_am243_launchpad.cfg
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments AM243 Launchpad
+# https://www.ti.com/tool/LP-AM243
+#
+
+# AM243 Launchpad has an xds110 onboard.
+source [find interface/xds110.cfg]
+
+transport select jtag
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 20
+
+if { ![info exists SOC] } {
+ set SOC am243
+}
+
+source [find target/ti_k3.cfg]
+
+adapter speed 250
diff --git a/tcl/board/ti_am263_launchpad.cfg b/tcl/board/ti_am263_launchpad.cfg
new file mode 100644
index 0000000..a07a21b
--- /dev/null
+++ b/tcl/board/ti_am263_launchpad.cfg
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments AM263 Launchpad
+# https://www.ti.com/tool/LP-AM263
+#
+
+# AM263 Launchpad has an xds110 onboard.
+source [find interface/xds110.cfg]
+
+transport select jtag
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 20
+
+if { ![info exists SOC] } {
+ set SOC am263
+}
+
+source [find target/ti_k3.cfg]
+
+adapter speed 250
diff --git a/tcl/board/ti_am273_launchpad.cfg b/tcl/board/ti_am273_launchpad.cfg
new file mode 100644
index 0000000..c17170b
--- /dev/null
+++ b/tcl/board/ti_am273_launchpad.cfg
@@ -0,0 +1,25 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Copyright (C) 2023 Texas Instruments Incorporated - http://www.ti.com/
+#
+# Texas Instruments AM273 Launchpad
+# https://www.ti.com/tool/LP-AM273
+#
+
+# AM273 Launchpad has an xds110 onboard.
+source [find interface/xds110.cfg]
+
+transport select jtag
+
+# default JTAG configuration has only SRST and no TRST
+reset_config srst_only srst_push_pull
+
+# delay after SRST goes inactive
+adapter srst delay 20
+
+if { ![info exists SOC] } {
+ set SOC am273
+}
+
+source [find target/ti_k3.cfg]
+
+adapter speed 250
diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index 1cd85ee..23825b8 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -2,24 +2,30 @@
# Copyright (C) 2019-2021 Texas Instruments Incorporated - http://www.ti.com/
#
# Texas Instruments K3 devices:
+# * AM243: https://www.ti.com/lit/pdf/spruim2
+# Has 4 R5 Cores, M4F and an M3
+# * AM263: https://www.ti.com/lit/pdf/spruj17
+# Has 4 R5 Cores and an M3
+# * AM273: https://www.ti.com/lit/pdf/spruiu0
+# Has 2 R5 Cores and an M3
+# * AM625: https://www.ti.com/lit/pdf/spruiv7a
+# Has 4 ARMV8 Cores and 1 R5 Core and an M4F
+# * AM62A7: https://www.ti.com/lit/pdf/spruj16a
+# Has 4 ARMV8 Cores and 2 R5 Cores
+# * AM62P: https://www.ti.com/lit/pdf/spruj83
+# Has 4 ARMV8 Cores and 2 R5 Cores
+# * AM642: https://www.ti.com/lit/pdf/spruim2
+# Has 2 ARMV8 Cores and 4 R5 Cores, M4F and an M3
# * AM654x: https://www.ti.com/lit/pdf/spruid7
# Has 4 ARMV8 Cores and 2 R5 Cores and an M3
-# * J721E: https://www.ti.com/lit/pdf/spruil1
-# Has 2 ARMV8 Cores and 6 R5 Cores and an M3
# * J7200: https://www.ti.com/lit/pdf/spruiu1
# Has 2 ARMV8 Cores and 4 R5 Cores and an M3
+# * J721E: https://www.ti.com/lit/pdf/spruil1
+# Has 2 ARMV8 Cores and 6 R5 Cores and an M3
# * J721S2: https://www.ti.com/lit/pdf/spruj28
# Has 2 ARMV8 Cores and 6 R5 Cores and an M4F
# * J784S4/AM69: http://www.ti.com/lit/zip/spruj52
# Has 8 ARMV8 Cores and 8 R5 Cores
-# * AM642: https://www.ti.com/lit/pdf/spruim2
-# Has 2 ARMV8 Cores and 4 R5 Cores, M4F and an M3
-# * AM625: https://www.ti.com/lit/pdf/spruiv7a
-# Has 4 ARMV8 Cores and 1 R5 Core and an M4F
-# * AM62a7: https://www.ti.com/lit/pdf/spruj16a
-# Has 4 ARMV8 Cores and 2 R5 Cores
-# * AM62P: https://www.ti.com/lit/pdf/spruj83
-# Has 4 ARMV8 Cores and 2 R5 Cores
#
source [find target/swj-dp.tcl]
@@ -44,6 +50,7 @@ set CM3_CTIBASE {0x3C016000}
# sysctrl power-ap unlock offsets
set _sysctrl_ap_unlock_offsets {0xf0 0x44}
+set _sysctrl_ap_num 7
# All the ARMV8s are the next processors.
# CL0,CORE0 CL0,CORE1 CL1,CORE0 CL1,CORE1
@@ -55,6 +62,7 @@ set ARMV8_CTIBASE {0x90420000 0x90520000 0x90820000 0x90920000}
set R5_DBGBASE {0x9d010000 0x9d012000 0x9d410000 0x9d412000 0x9d510000 0x9d512000}
set R5_CTIBASE {0x9d018000 0x9d019000 0x9d418000 0x9d419000 0x9d518000 0x9d519000}
set R5_NAMES {mcu_r5.0 mcu_r5.1 main0_r5.0 main0_r5.1 main1_r5.0 main1_r5.1}
+set _r5_ap_num 1
# Finally an General Purpose(GP) MCU
set CM4_CTIBASE {0x20001000}
@@ -64,8 +72,46 @@ set _gp_mcu_cores 0
# General Purpose MCU power-ap unlock offsets
set _gp_mcu_ap_unlock_offsets {0xf0 0x60}
+# Generic mem-ap port number
+set _mem_ap_num 2
+
# Set configuration overrides for each SOC
switch $_soc {
+ am263 {
+ set _K3_DAP_TAPID 0x2bb7d02f
+
+ # Mem-ap port
+ set _mem_ap_num 6
+
+ # AM263 has 0 ARMV8 CPUs
+ set _armv8_cores 0
+
+ # AM263 has 2 cluster of 2 R5s cores.
+ set _r5_cores 4
+ set R5_NAMES {main0_r5.0 main0_r5.1 main1_r5.0 main1_r5.1}
+ set R5_DBGBASE {0x90030000 0x90032000 0x90050000 0x90052000}
+ set R5_CTIBASE {0x90038000 0x90039000 0x90058000 0x90059000}
+ set _r5_ap_num 5
+ }
+ am273 {
+ set _K3_DAP_TAPID 0x1bb6a02f
+
+ # Mem-ap port
+ set _mem_ap_num 6
+
+ # system controller is on AP0
+ set _sysctrl_ap_num 0
+
+ # AM273 has 0 ARMV8 CPUs
+ set _armv8_cores 0
+
+ # AM273 has 1 cluster of 2 R5s cores.
+ set _r5_cores 2
+ set R5_NAMES {main0_r5.0 main0_r5.1}
+ set R5_DBGBASE {0x90030000 0x90032000}
+ set R5_CTIBASE {0x90038000 0x90039000}
+ set _r5_ap_num 5
+ }
am654 {
set _K3_DAP_TAPID 0x0bb5a02f
@@ -80,6 +126,7 @@ switch $_soc {
# Sysctrl power-ap unlock offsets
set _sysctrl_ap_unlock_offsets {0xf0 0x50}
}
+ am243 -
am642 {
set _K3_DAP_TAPID 0x0bb3802f
@@ -97,6 +144,12 @@ switch $_soc {
# M4 processor
set _gp_mcu_cores 1
+
+ # Overrides for am243
+ if { "$_soc" == "am243" } {
+ # Uses the same JTAG ID
+ set _armv8_cores 0
+ }
}
am625 {
set _K3_DAP_TAPID 0x0bb7e02f
@@ -266,9 +319,11 @@ set _TARGETNAME $_CHIPNAME.cpu
set _CTINAME $_CHIPNAME.cti
# sysctrl is always present
-cti create $_CTINAME.sysctrl -dap $_CHIPNAME.dap -ap-num 7 -baseaddr [lindex $CM3_CTIBASE 0]
+cti create $_CTINAME.sysctrl -dap $_CHIPNAME.dap \
+ -ap-num $_sysctrl_ap_num -baseaddr [lindex $CM3_CTIBASE 0]
-target create $_TARGETNAME.sysctrl cortex_m -dap $_CHIPNAME.dap -ap-num 7 -defer-examine \
+target create $_TARGETNAME.sysctrl cortex_m -dap $_CHIPNAME.dap \
+ -ap-num $_sysctrl_ap_num -defer-examine \
-rtos [_get_rtos_type_for_cpu $_TARGETNAME.sysctrl]
$_TARGETNAME.sysctrl configure -event reset-assert { }
@@ -334,34 +389,36 @@ for { set _core 0 } { $_core < $_armv8_cores } { incr _core } {
}
}
-# Setup ARMV8 proc commands based on CPU to prevent people confusing SoCs
-set _armv8_up_cmd "$_armv8_cpu_name"_up
-# Available if V8_SMP_DEBUG is set to non-zero value
-set _armv8_smp_cmd "$_armv8_cpu_name"_smp
+if { $_armv8_cores > 0 } {
+ # Setup ARMV8 proc commands based on CPU to prevent people confusing SoCs
+ set _armv8_up_cmd "$_armv8_cpu_name"_up
+ # Available if V8_SMP_DEBUG is set to non-zero value
+ set _armv8_smp_cmd "$_armv8_cpu_name"_smp
-if { $_v8_smp_debug == 0 } {
- proc $_armv8_up_cmd { args } {
- foreach _core $args {
- targets $_core
- _cpu_no_smp_up
+ if { $_v8_smp_debug == 0 } {
+ proc $_armv8_up_cmd { args } {
+ foreach _core $args {
+ targets $_core
+ _cpu_no_smp_up
+ }
}
+ } else {
+ proc $_armv8_smp_cmd { args } {
+ _armv8_smp_up
+ }
+ # Declare SMP
+ target smp {*}$_v8_smp_targets
}
-} else {
- proc $_armv8_smp_cmd { args } {
- _armv8_smp_up
- }
- # Declare SMP
- target smp {*}$_v8_smp_targets
}
for { set _core 0 } { $_core < $_r5_cores } { incr _core } {
set _r5_name [lindex $R5_NAMES $_core]
- cti create $_CTINAME.$_r5_name -dap $_CHIPNAME.dap -ap-num 1 \
+ cti create $_CTINAME.$_r5_name -dap $_CHIPNAME.dap -ap-num $_r5_ap_num \
-baseaddr [lindex $R5_CTIBASE $_core]
# inactive core examination will fail - wait till startup of additional core
target create $_TARGETNAME.$_r5_name cortex_r4 -dap $_CHIPNAME.dap \
- -dbgbase [lindex $R5_DBGBASE $_core] -ap-num 1 -defer-examine \
+ -dbgbase [lindex $R5_DBGBASE $_core] -ap-num $_r5_ap_num -defer-examine \
-rtos [_get_rtos_type_for_cpu $_TARGETNAME.$_r5_name]
$_TARGETNAME.$_r5_name configure -event gdb-attach {
@@ -419,5 +476,5 @@ if { 0 == [string compare [adapter name] dmem ] } {
}
} else {
# AXI AP access port for SoC address map
- target create $_CHIPNAME.axi_ap mem_ap -dap $_CHIPNAME.dap -ap-num 2
+ target create $_CHIPNAME.axi_ap mem_ap -dap $_CHIPNAME.dap -ap-num $_mem_ap_num
}
generated by cgit v1.1 at 2024-08-16 01:56:55 +0000