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| author | George Voicu <razvanvg@hotmail.com> | 2022-11-05 11:08:43 +0100 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2024-06-15 14:13:58 +0000 |
| commit | a420f00d106cb2638bb4c272a4780e05623ea64b (patch) | |
| tree | 44330bf30ffddb2566bd155d88c73a2cafcb00bc /tcl | |
| parent | ed30c9a572ba8b7e8959f8998ebfeaaa12a37d70 (diff) | |
| download | riscv-openocd-a420f00d106cb2638bb4c272a4780e05623ea64b.zip riscv-openocd-a420f00d106cb2638bb4c272a4780e05623ea64b.tar.gz riscv-openocd-a420f00d106cb2638bb4c272a4780e05623ea64b.tar.bz2 | |
tcl/fpga: Support for Xilinx Spartan3 series devices
Tap definition for Xilinx Spartan 3/3E/3A/3AN/3A-DSP devices.
Signed-off-by: George Voicu <razvanvg@hotmail.com>
Change-Id: Ieda2b61fc270840f9192976697fcac259c45e3b8
Reviewed-on: https://review.openocd.org/c/openocd/+/7335
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Diffstat (limited to 'tcl')
| -rw-r--r-- | tcl/fpga/xilinx-xc3s.cfg | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/tcl/fpga/xilinx-xc3s.cfg b/tcl/fpga/xilinx-xc3s.cfg new file mode 100644 index 0000000..7c17206 --- /dev/null +++ b/tcl/fpga/xilinx-xc3s.cfg @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: GPL-2.0-or-later + +# Xilinx Spartan3 generation +# https://www.xilinx.com/support/documentation/user_guides/ug331.pdf + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME xc3s +} + +# Table 12-4 in https://www.xilinx.com/support/documentation/user_guides/ug332.pdf +# the 4 top bits (28:31) are the die stepping, ignore them. +jtag newtap $_CHIPNAME tap -irlen 6 -ignore-version \ + -expected-id 0x02210093 \ + -expected-id 0x02218093 \ + -expected-id 0x02220093 \ + -expected-id 0x02228093 \ + -expected-id 0x02230093 \ + -expected-id 0x02610093 \ + -expected-id 0x02618093 \ + -expected-id 0x02620093 \ + -expected-id 0x02628093 \ + -expected-id 0x02630093 \ + -expected-id 0x03840093 \ + -expected-id 0x0384E093 \ + -expected-id 0x01C10093 \ + -expected-id 0x01C1A093 \ + -expected-id 0x01C22093 \ + -expected-id 0x01C2E093 \ + -expected-id 0x01C3A093 \ + -expected-id 0x0140C093 \ + -expected-id 0x01414093 \ + -expected-id 0x0141C093 \ + -expected-id 0x01428093 \ + -expected-id 0x01434093 \ + -expected-id 0x01440093 \ + -expected-id 0x01448093 \ + -expected-id 0x01450093 + +pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap + +source [find fpga/xilinx-dna.cfg] |