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| author | Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> | 2014-11-18 17:30:44 +0300 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2014-11-24 22:28:10 +0000 |
| commit | 9c4d2946548f72d77f103b978ab30501d5953f04 (patch) | |
| tree | 4a71bfe91c85fe76d689d4fcdf62f0313c283ab2 /tcl | |
| parent | 41a968ec055c309d2eb669c20f831e169b4dc2e2 (diff) | |
| download | riscv-openocd-9c4d2946548f72d77f103b978ab30501d5953f04.zip riscv-openocd-9c4d2946548f72d77f103b978ab30501d5953f04.tar.gz riscv-openocd-9c4d2946548f72d77f103b978ab30501d5953f04.tar.bz2 | |
tcl/target/stm32f4: ramp up JTAG speed, HSI is 16MHz there
Since all F4 parts have an internal HSI providing 16MHz, it's safe to
use 2MHz JTAG frequency by default.
Change-Id: I2702d5a1d642d4acd4af2db54c028949132c6900
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2383
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'tcl')
| -rw-r--r-- | tcl/target/stm32f4x.cfg | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tcl/target/stm32f4x.cfg b/tcl/target/stm32f4x.cfg index ecd39de..a7ec5ea 100644 --- a/tcl/target/stm32f4x.cfg +++ b/tcl/target/stm32f4x.cfg @@ -73,13 +73,13 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME -# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz +# JTAG speed should be <= F_CPU/6. F_CPU after reset is 16MHz, so use F_JTAG = 2MHz # # Since we may be running of an RC oscilator, we crank down the speed a # bit more to be on the safe side. Perhaps superstition, but if are # running off a crystal, we can run closer to the limit. Note # that there can be a pretty wide band where things are more or less stable. -adapter_khz 1000 +adapter_khz 2000 adapter_nsrst_delay 100 if {[using_jtag]} { |