diff options
author | Ed Beroset <beroset@ieee.org> | 2015-03-05 20:43:09 -0500 |
---|---|---|
committer | Paul Fertser <fercerpav@gmail.com> | 2015-04-14 11:48:50 +0100 |
commit | 7a7086e644ecdf4bca8f6c50cc6c31044cfa132d (patch) | |
tree | fa2e6e67f5dc0bc97e31ed1007978102c8098110 /tcl | |
parent | e968fd189537892caaf91d6012e77bafa0b76751 (diff) | |
download | riscv-openocd-7a7086e644ecdf4bca8f6c50cc6c31044cfa132d.zip riscv-openocd-7a7086e644ecdf4bca8f6c50cc6c31044cfa132d.tar.gz riscv-openocd-7a7086e644ecdf4bca8f6c50cc6c31044cfa132d.tar.bz2 |
em357: Corrected EM357 support including errata details
Original submitted code had only been tested with em358, but testing with
actual em357 revealed errors that this patch corrects.
Change-Id: I70cf31210de8ed84e3755a56e76261ad200322bb
Signed-off-by: Ed Beroset <beroset@ieee.org>
Reviewed-on: http://openocd.zylin.com/2581
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'tcl')
-rw-r--r-- | tcl/target/em357.cfg | 13 | ||||
-rw-r--r-- | tcl/target/em358.cfg | 5 |
2 files changed, 15 insertions, 3 deletions
diff --git a/tcl/target/em357.cfg b/tcl/target/em357.cfg index f44b298..24ffb04 100644 --- a/tcl/target/em357.cfg +++ b/tcl/target/em357.cfg @@ -34,7 +34,7 @@ if { [info exists CPUTAPID] } { if { [info exists BSTAPID] } { set _BSTAPID $BSTAPID } else { - set _BSTAPID 0x069aa62b + set _BSTAPID 0x069a962b } if { [info exists CHIPNAME] } { @@ -63,5 +63,14 @@ set _FLASHNAME $_CHIPNAME.flash flash bank $_FLASHNAME em357 0x08000000 $_FLASHSIZE 0 0 $_TARGETNAME if { ![using_hla]} { - cortex_m reset_config sysresetreq +# according to errata, we need to use vectreset rather than sysresetreq to avoid lockup +# There is a bug in the chip, which means that when using external debuggers the chip +# may lock up in certain CPU clock modes. Affected modes are operating the CPU at +# 24MHz derived from the 24MHz crystal, or 12MHz derived from the high frequency RC +# oscillator. If an external debugger tool asserts SYSRESETREQ, the chip will lock up and +# require a pin reset or power cycle. +# +# for details, refer to: +# http://www.silabs.com/Support%20Documents/TechnicalDocs/EM35x-Errata.pdf + cortex_m reset_config vectreset } diff --git a/tcl/target/em358.cfg b/tcl/target/em358.cfg index c2d48bf..92e65a4 100644 --- a/tcl/target/em358.cfg +++ b/tcl/target/em358.cfg @@ -1,4 +1,3 @@ -# # Target configuration for the Silicon Labs EM358 chips # @@ -9,6 +8,10 @@ if { ![info exists CHIPNAME] } { set CHIPNAME em358 } +if { ![info exists BSTAPID] } { + set BSTAPID 0x069aa62b +} + # 512K of flash in the em358 chips set FLASHSIZE 0x80000 source [find target/em357.cfg] |