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author | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-09-13 20:07:13 +0000 |
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committer | oharboe <oharboe@b42882b7-edfa-0310-969c-e2dbd0fdcd60> | 2009-09-13 20:07:13 +0000 |
commit | 772d8d06eabf94ad30470dfdb167ab9e80a69062 (patch) | |
tree | 75737a7968c623d718ca193afa50288fdf43c90e /tcl | |
parent | d4607c1f7c51806f10a9e74a21de724ce7ccc9bf (diff) | |
download | riscv-openocd-772d8d06eabf94ad30470dfdb167ab9e80a69062.zip riscv-openocd-772d8d06eabf94ad30470dfdb167ab9e80a69062.tar.gz riscv-openocd-772d8d06eabf94ad30470dfdb167ab9e80a69062.tar.bz2 |
Magnus Lundin <lundin@mlu.mine.nu> Disable poll while core register initialization
git-svn-id: svn://svn.berlios.de/openocd/trunk@2703 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Diffstat (limited to 'tcl')
-rw-r--r-- | tcl/target/omap3530.cfg | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/tcl/target/omap3530.cfg b/tcl/target/omap3530.cfg index 50a3f47..c9d4898 100644 --- a/tcl/target/omap3530.cfg +++ b/tcl/target/omap3530.cfg @@ -41,6 +41,7 @@ target create omap3.cpu cortex_a8 -chain-position $_CHIPNAME.dap # FIXME much of this should be in reset event handlers proc omap3_dbginit { } { + poll off reset sleep 500 @@ -65,4 +66,5 @@ proc omap3_dbginit { } { # omap3.cpu mdw 0x54011080 omap3.cpu mww 0x5401d030 0x00002000 + poll on } |