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| author | Jason Kacines <j-kacines@ti.com> | 2023-08-09 09:10:13 -0500 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2023-08-26 11:41:36 +0000 |
| commit | 627e949fc67eb7e77dd9fb3c51d3e0e8899e04ea (patch) | |
| tree | b6b8d42d9ba8a2486ecdc2daacb66e68260cf249 /tcl | |
| parent | 154d7f5e185d80a4e49920bed917551b76ace858 (diff) | |
| download | riscv-openocd-627e949fc67eb7e77dd9fb3c51d3e0e8899e04ea.zip riscv-openocd-627e949fc67eb7e77dd9fb3c51d3e0e8899e04ea.tar.gz riscv-openocd-627e949fc67eb7e77dd9fb3c51d3e0e8899e04ea.tar.bz2 | |
tcl/target/ti_k3: Add AM62A7 SoC
Add support for the TI K3 family AM62A7 SoC.
For further details, see https://www.ti.com/lit/pdf/spruj16a
Change-Id: Ie69bde4895f34b04f9967f63d1ca9c8149c50b8a
Signed-off-by: Jason Kacines <j-kacines@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7854
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Diffstat (limited to 'tcl')
| -rw-r--r-- | tcl/target/ti_k3.cfg | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg index 20b78ba..99b5b51 100644 --- a/tcl/target/ti_k3.cfg +++ b/tcl/target/ti_k3.cfg @@ -14,6 +14,8 @@ # Has 2 ARMV8 Cores and 4 R5 Cores, M4F and an M3 # * AM625: https://www.ti.com/lit/pdf/spruiv7a # Has 4 ARMV8 Cores and 1 R5 Core and an M4F +# * AM62a7: https://www.ti.com/lit/pdf/spruj16a +# Has 4 ARMV8 Cores and 2 R5 Cores # source [find target/swj-dp.tcl] @@ -119,6 +121,27 @@ switch $_soc { set _gp_mcu_cores 1 set _gp_mcu_ap_unlock_offsets {0xf0 0x7c} } + am62a7 { + set _CHIPNAME am62a7 + set _K3_DAP_TAPID 0x0bb8d02f + + # AM62a7 has 1 clusters of 4 A53 cores. + set _armv8_cpu_name a53 + set _armv8_cores 4 + set ARMV8_DBGBASE {0x90010000 0x90110000 0x90210000 0x90310000} + set ARMV8_CTIBASE {0x90020000 0x90120000 0x90220000 0x90320000} + + # AM62a7 has 2 cluster of 1 R5s core. + set _r5_cores 2 + set R5_NAMES {main0_r5.0 mcu0_r5.0} + set R5_DBGBASE {0x9d410000 0x9d810000} + set R5_CTIBASE {0x9d418000 0x9d818000} + + # sysctrl CTI base + set CM3_CTIBASE {0x20001000} + # Sysctrl power-ap unlock offsets + set _sysctrl_ap_unlock_offsets {0xf0 0x78} + } j721e { set _CHIPNAME j721e set _K3_DAP_TAPID 0x0bb6402f |