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author | Dubravko Srsan <dubravko.srsan@dolotron.com> | 2023-09-13 16:23:03 -0500 |
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committer | Antonio Borneo <borneo.antonio@gmail.com> | 2023-10-07 14:45:11 +0000 |
commit | 7abb93aad4039f88427e1179660c0ee68146e6d4 (patch) | |
tree | cb8282013d1eba91406875d6937fd732fbb987f4 /tcl/target | |
parent | 871276cfead7d1ebf11492a1c82691835e1f135a (diff) | |
download | riscv-openocd-7abb93aad4039f88427e1179660c0ee68146e6d4.zip riscv-openocd-7abb93aad4039f88427e1179660c0ee68146e6d4.tar.gz riscv-openocd-7abb93aad4039f88427e1179660c0ee68146e6d4.tar.bz2 |
tcl/target/ti_k3: Add coreid identification to SMP processors
Describe the SMP Armv8 cores in SMP configuration with coreid
explicitly called out. This allows for gdb session to call the smp
behavior clearly.
Change-Id: Ie43be22db64737bbb66181f09d3c83567044f3ac
Signed-off-by: Dubravko Srsan <dubravko.srsan@dolotron.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7897
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Diffstat (limited to 'tcl/target')
-rw-r--r-- | tcl/target/ti_k3.cfg | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg index 3c000ed..bd7496e 100644 --- a/tcl/target/ti_k3.cfg +++ b/tcl/target/ti_k3.cfg @@ -303,7 +303,7 @@ for { set _core 0 } { $_core < $_armv8_cores } { incr _core } { cti create $_CTINAME.$_armv8_cpu_name.$_core -dap $_CHIPNAME.dap -ap-num 1 \ -baseaddr [lindex $ARMV8_CTIBASE $_core] - target create $_TARGETNAME.$_armv8_cpu_name.$_core aarch64 -dap $_CHIPNAME.dap \ + target create $_TARGETNAME.$_armv8_cpu_name.$_core aarch64 -dap $_CHIPNAME.dap -coreid $_core \ -dbgbase [lindex $ARMV8_DBGBASE $_core] -cti $_CTINAME.$_armv8_cpu_name.$_core -defer-examine set _v8_smp_targets "$_v8_smp_targets $_TARGETNAME.$_armv8_cpu_name.$_core" |